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Main Instructions

0 1 2 3 4 5 6 7 8 9 A B C D E F
0 nop
Opcode
00
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
No operation is performed.
ld bc,nn
Opcode
01 nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads nn into BC.
ld (bc),a
Opcode
02
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores A into the memory location pointed to by BC.
inc bc
Opcode
03
Bytes
1
Cycles
6
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Adds one to BC.
inc b
Opcode
04
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to B.
dec b
Opcode
05
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from B.
ld b,n
Opcode
06 n
Bytes
2
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into B.
rlca
Opcode
07
Bytes
1
Cycles
4
C
as defined
N
reset
P/V
unaffected
H
reset
Z
unaffected
S
unaffected
The contents of A are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
ex af,af'
Opcode
08
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Exchanges the 16-bit contents of AF and AF'.
add hl,bc
Opcode
09
Bytes
1
Cycles
11
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of BC is added to HL.
ld a,(bc)
Opcode
0A
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by BC into A.
dec bc
Opcode
0B
Bytes
1
Cycles
6
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Subtracts one from BC.
inc c
Opcode
0C
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to C.
dec c
Opcode
0D
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from C.
ld c,n
Opcode
0E n
Bytes
2
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into C.
rrca
Opcode
0F
Bytes
1
Cycles
4
C
as defined
N
reset
P/V
unaffected
H
reset
Z
unaffected
S
unaffected
The contents of A are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
1 djnz d
Opcode
10 d-$-2
Bytes
2
Cycles
13/8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The B register is decremented, and if not zero, the signed value d is added to pc. The jump is measured from the start of the instruction opcode.
ld de,nn
Opcode
11 nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads nn into DE.
ld (de),a
Opcode
12
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores A into the memory location pointed to by DE.
inc de
Opcode
13
Bytes
1
Cycles
6
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Adds one to DE.
inc d
Opcode
14
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to D.
dec d
Opcode
15
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from D.
ld d,n
Opcode
16 n
Bytes
2
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into D.
rla
Opcode
17
Bytes
1
Cycles
4
C
as defined
N
reset
P/V
unaffected
H
reset
Z
unaffected
S
unaffected
The contents of A are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
jr d
Opcode
18 d-$-2
Bytes
2
Cycles
12
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The signed value d is added to pc. The jump is measured from the start of the instruction opcode.
add hl,de
Opcode
19
Bytes
1
Cycles
11
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of DE is added to HL.
ld a,(de)
Opcode
1A
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by DE into A.
dec de
Opcode
1B
Bytes
1
Cycles
6
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Subtracts one from DE.
inc e
Opcode
1C
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to E.
dec e
Opcode
1D
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from E.
ld e,n
Opcode
1E n
Bytes
2
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into E.
rra
Opcode
1F
Bytes
1
Cycles
4
C
as defined
N
reset
P/V
unaffected
H
reset
Z
unaffected
S
unaffected
The contents of A are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
2 jr nz,d
Opcode
20 d-$-2
Bytes
2
Cycles
12/7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the zero flag is unset, the signed value d is added to pc. The jump is measured from the start of the instruction opcode.
ld hl,nn
Opcode
21 nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads nn into HL.
ld (nn),hl
Opcode
22 nn
Bytes
3
Cycles
16
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores HL into the memory location pointed to by nn.
inc hl
Opcode
23
Bytes
1
Cycles
6
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Adds one to HL.
inc h
Opcode
24
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to H.
dec h
Opcode
25
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from H.
ld h,n
Opcode
26 n
Bytes
2
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into H.
daa
Opcode
27
Bytes
1
Cycles
4
C
exceptional
N
unaffected
P/V
detects parity
H
exceptional
Z
as defined
S
as defined
Adjusts A for BCD addition and subtraction operations.
jr z,d
Opcode
28 d-$-2
Bytes
2
Cycles
12/7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the zero flag is set, the signed value d is added to pc. The jump is measured from the start of the instruction opcode.
add hl,hl
Opcode
29
Bytes
1
Cycles
11
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of HL is added to HL.
ld hl,(nn)
Opcode
2A nn
Bytes
3
Cycles
16
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by nn into HL.
dec hl
Opcode
2B
Bytes
1
Cycles
6
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Subtracts one from HL.
inc l
Opcode
2C
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to L.
dec l
Opcode
2D
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from L.
ld l,n
Opcode
2E n
Bytes
2
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into L.
cpl
Opcode
2F
Bytes
1
Cycles
4
C
unaffected
N
set
P/V
unaffected
H
set
Z
unaffected
S
unaffected
The contents of A are inverted (one's complement).
3 jr nc,d
Opcode
30 d-$-2
Bytes
2
Cycles
12/7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the carry flag is unset, the signed value d is added to pc. The jump is measured from the start of the instruction opcode.
ld sp,nn
Opcode
31 nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads nn into SP.
ld (nn),a
Opcode
32 nn
Bytes
3
Cycles
13
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores A into the memory location pointed to by nn.
inc sp
Opcode
33
Bytes
1
Cycles
6
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Adds one to SP.
inc (hl)
Opcode
34
Bytes
1
Cycles
11
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to (HL).
dec (hl)
Opcode
35
Bytes
1
Cycles
11
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from (HL).
ld (hl),n
Opcode
36 n
Bytes
2
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into (HL).
scf
Opcode
37
Bytes
1
Cycles
4
C
set
N
reset
P/V
unaffected
H
reset
Z
unaffected
S
unaffected
Sets the carry flag.
jr c,d
Opcode
38 d-$-2
Bytes
2
Cycles
12/7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the carry flag is set, the signed value d is added to pc. The jump is measured from the start of the instruction opcode.
add hl,sp
Opcode
39
Bytes
1
Cycles
11
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of SP is added to HL.
ld a,(nn)
Opcode
3A nn
Bytes
3
Cycles
13
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by nn into A.
dec sp
Opcode
3B
Bytes
1
Cycles
6
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Subtracts one from SP.
inc a
Opcode
3C
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to A.
dec a
Opcode
3D
Bytes
1
Cycles
4
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from A.
ld a,n
Opcode
3E n
Bytes
2
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into A.
ccf
Opcode
3F
Bytes
1
Cycles
4
C
exceptional
N
reset
P/V
unaffected
H
exceptional
Z
unaffected
S
unaffected
Inverts the carry flag.
4 ld b,b
Opcode
40
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into B.
ld b,c
Opcode
41
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into B.
ld b,d
Opcode
42
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into B.
ld b,e
Opcode
43
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into B.
ld b,h
Opcode
44
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of H are loaded into B.
ld b,l
Opcode
45
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of L are loaded into B.
ld b,(hl)
Opcode
46
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of (HL) are loaded into B.
ld b,a
Opcode
47
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into B.
ld c,b
Opcode
48
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into C.
ld c,c
Opcode
49
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into C.
ld c,d
Opcode
4A
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into C.
ld c,e
Opcode
4B
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into C.
ld c,h
Opcode
4C
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of H are loaded into C.
ld c,l
Opcode
4D
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of L are loaded into C.
ld c,(hl)
Opcode
4E
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of (HL) are loaded into C.
ld c,a
Opcode
4F
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into C.
5 ld d,b
Opcode
50
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into D.
ld d,c
Opcode
51
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into D.
ld d,d
Opcode
52
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into D.
ld d,e
Opcode
53
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into D.
ld d,h
Opcode
54
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of H are loaded into D.
ld d,l
Opcode
55
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of L are loaded into D.
ld d,(hl)
Opcode
56
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of (HL) are loaded into D.
ld d,a
Opcode
57
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into D.
ld e,b
Opcode
58
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into E.
ld e,c
Opcode
59
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into E.
ld e,d
Opcode
5A
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into E.
ld e,e
Opcode
5B
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into E.
ld e,h
Opcode
5C
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of H are loaded into E.
ld e,l
Opcode
5D
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of L are loaded into E.
ld e,(hl)
Opcode
5E
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of (HL) are loaded into E.
ld e,a
Opcode
5F
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into E.
6 ld h,b
Opcode
60
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into H.
ld h,c
Opcode
61
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into H.
ld h,d
Opcode
62
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into H.
ld h,e
Opcode
63
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into H.
ld h,h
Opcode
64
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of H are loaded into H.
ld h,l
Opcode
65
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of L are loaded into H.
ld h,(hl)
Opcode
66
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of (HL) are loaded into H.
ld h,a
Opcode
67
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into H.
ld l,b
Opcode
68
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into L.
ld l,c
Opcode
69
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into L.
ld l,d
Opcode
6A
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into L.
ld l,e
Opcode
6B
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into L.
ld l,h
Opcode
6C
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of H are loaded into L.
ld l,l
Opcode
6D
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of L are loaded into L.
ld l,(hl)
Opcode
6E
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of (HL) are loaded into L.
ld l,a
Opcode
6F
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into L.
7 ld (hl),b
Opcode
70
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into (HL).
ld (hl),c
Opcode
71
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into (HL).
ld (hl),d
Opcode
72
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into (HL).
ld (hl),e
Opcode
73
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into (HL).
ld (hl),h
Opcode
74
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of H are loaded into (HL).
ld (hl),l
Opcode
75
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of L are loaded into (HL).
halt
Opcode
76
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Suspends CPU operation until an interrupt or reset occurs.
ld (hl),a
Opcode
77
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into (HL).
ld a,b
Opcode
78
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into A.
ld a,c
Opcode
79
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into A.
ld a,d
Opcode
7A
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into A.
ld a,e
Opcode
7B
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into A.
ld a,h
Opcode
7C
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of H are loaded into A.
ld a,l
Opcode
7D
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of L are loaded into A.
ld a,(hl)
Opcode
7E
Bytes
1
Cycles
7
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of (HL) are loaded into A.
ld a,a
Opcode
7F
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into A.
8 add a,b
Opcode
80
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds B to A.
add a,c
Opcode
81
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds C to A.
add a,d
Opcode
82
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds D to A.
add a,e
Opcode
83
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds E to A.
add a,h
Opcode
84
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds H to A.
add a,l
Opcode
85
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds L to A.
add a,(hl)
Opcode
86
Bytes
1
Cycles
7
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds (HL) to A.
add a,a
Opcode
87
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds A to A.
adc a,b
Opcode
88
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds B and the carry flag to A.
adc a,c
Opcode
89
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds C and the carry flag to A.
adc a,d
Opcode
8A
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds D and the carry flag to A.
adc a,e
Opcode
8B
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds E and the carry flag to A.
adc a,h
Opcode
8C
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds H and the carry flag to A.
adc a,l
Opcode
8D
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds L and the carry flag to A.
adc a,(hl)
Opcode
8E
Bytes
1
Cycles
7
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds (HL) and the carry flag to A.
adc a,a
Opcode
8F
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds A and the carry flag to A.
9 sub b
Opcode
90
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts B from A.
sub c
Opcode
91
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts C from A.
sub d
Opcode
92
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts D from A.
sub e
Opcode
93
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts E from A.
sub h
Opcode
94
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts H from A.
sub l
Opcode
95
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts L from A.
sub (hl)
Opcode
96
Bytes
1
Cycles
7
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts (HL) from A.
sub a
Opcode
97
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts A from A.
sbc a,b
Opcode
98
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts B and the carry flag from A.
sbc a,c
Opcode
99
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts C and the carry flag from A.
sbc a,d
Opcode
9A
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts D and the carry flag from A.
sbc a,e
Opcode
9B
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts E and the carry flag from A.
sbc a,h
Opcode
9C
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts H and the carry flag from A.
sbc a,l
Opcode
9D
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts L and the carry flag from A.
sbc a,(hl)
Opcode
9E
Bytes
1
Cycles
7
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts (HL) and the carry flag from A.
sbc a,a
Opcode
9F
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts A and the carry flag from A.
A and b
Opcode
A0
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with B.
and c
Opcode
A1
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with C.
and d
Opcode
A2
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with D.
and e
Opcode
A3
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with E.
and h
Opcode
A4
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with H.
and l
Opcode
A5
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with L.
and (hl)
Opcode
A6
Bytes
1
Cycles
7
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with (HL).
and a
Opcode
A7
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with A.
xor b
Opcode
A8
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with B.
xor c
Opcode
A9
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with C.
xor d
Opcode
AA
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with D.
xor e
Opcode
AB
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with E.
xor h
Opcode
AC
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with H.
xor l
Opcode
AD
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with L.
xor (hl)
Opcode
AE
Bytes
1
Cycles
7
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with (HL).
xor a
Opcode
AF
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with A.
B or b
Opcode
B0
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with B.
or c
Opcode
B1
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with C.
or d
Opcode
B2
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with D.
or e
Opcode
B3
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with E.
or h
Opcode
B4
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with H.
or l
Opcode
B5
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with L.
or (hl)
Opcode
B6
Bytes
1
Cycles
7
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with (HL).
or a
Opcode
B7
Bytes
1
Cycles
4
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with A.
cp b
Opcode
B8
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts B from A and affects flags according to the result. A is not modified.
cp c
Opcode
B9
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts C from A and affects flags according to the result. A is not modified.
cp d
Opcode
BA
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts D from A and affects flags according to the result. A is not modified.
cp e
Opcode
BB
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts E from A and affects flags according to the result. A is not modified.
cp h
Opcode
BC
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts H from A and affects flags according to the result. A is not modified.
cp l
Opcode
BD
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts L from A and affects flags according to the result. A is not modified.
cp (hl)
Opcode
BE
Bytes
1
Cycles
7
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts (HL) from A and affects flags according to the result. A is not modified.
cp a
Opcode
BF
Bytes
1
Cycles
4
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts A from A and affects flags according to the result. A is not modified.
C ret nz
Opcode
C0
Bytes
1
Cycles
11/5
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the zero flag is unset, the top stack entry is popped into pc.
pop bc
Opcode
C1
Bytes
1
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The memory location pointed to by SP is stored into C and SP is incremented. The memory location pointed to by SP is stored into B and SP is incremented again.
jp nz,nn
Opcode
C2 nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the zero flag is unset, nn is copied to pc.
jp nn
Opcode
C3 nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
nn is copied to pc.
call nz,nn
Opcode
C4 nn
Bytes
3
Cycles
17/10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the zero flag is unset, the current pc value plus three is pushed onto the stack, then is loaded with nn.
push bc
Opcode
C5
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
SP is decremented and B is stored into the memory location pointed to by SP. SP is decremented again and C is stored into the memory location pointed to by SP.
add a,n
Opcode
C6 n
Bytes
2
Cycles
7
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds n to A.
rst 00h
Opcode
C7
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The current pc value plus one is pushed onto the stack, then is loaded with 0.
ret z
Opcode
C8
Bytes
1
Cycles
11/5
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the zero flag is set, the top stack entry is popped into pc.
ret
Opcode
C9
Bytes
1
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The top stack entry is popped into pc.
jp z,nn
Opcode
CA nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the zero flag is set, nn is copied to pc.
Bit call z,nn
Opcode
CC nn
Bytes
3
Cycles
17/10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the zero flag is set, the current pc value plus three is pushed onto the stack, then is loaded with nn.
call nn
Opcode
CD nn
Bytes
3
Cycles
17
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The current pc value plus three is pushed onto the stack, then is loaded with nn.
adc a,n
Opcode
CE n
Bytes
2
Cycles
7
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds n and the carry flag to A.
rst 08h
Opcode
CF
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The current pc value plus one is pushed onto the stack, then is loaded with 8.
D ret nc
Opcode
D0
Bytes
1
Cycles
11/5
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the carry flag is unset, the top stack entry is popped into pc.
pop de
Opcode
D1
Bytes
1
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The memory location pointed to by SP is stored into E and SP is incremented. The memory location pointed to by SP is stored into D and SP is incremented again.
jp nc,nn
Opcode
D2 nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the carry flag is unset, nn is copied to pc.
out (n),a
Opcode
D3 n
Bytes
2
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of A is written to port n.
call nc,nn
Opcode
D4 nn
Bytes
3
Cycles
17/10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the carry flag is unset, the current pc value plus three is pushed onto the stack, then is loaded with nn.
push de
Opcode
D5
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
SP is decremented and D is stored into the memory location pointed to by SP. SP is decremented again and E is stored into the memory location pointed to by SP.
sub n
Opcode
D6 n
Bytes
2
Cycles
7
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts n from A.
rst 10h
Opcode
D7
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The current pc value plus one is pushed onto the stack, then is loaded with 16.
ret c
Opcode
D8
Bytes
1
Cycles
11/5
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the carry flag is set, the top stack entry is popped into pc.
exx
Opcode
D9
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Exchanges the 16-bit contents of BC, DE, and HL with BC', DE', and HL'.
jp c,nn
Opcode
DA nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the carry flag is set, nn is copied to pc.
in a,(n)
Opcode
DB n
Bytes
2
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
A byte from port n is written to A.
call c,nn
Opcode
DC nn
Bytes
3
Cycles
17/10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the carry flag is set, the current pc value plus three is pushed onto the stack, then is loaded with nn.
IX sbc a,n
Opcode
DE n
Bytes
2
Cycles
7
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts n and the carry flag from A.
rst 18h
Opcode
DF
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The current pc value plus one is pushed onto the stack, then is loaded with 24.
E ret po
Opcode
E0
Bytes
1
Cycles
11/5
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the parity/overflow flag is unset, the top stack entry is popped into pc.
pop hl
Opcode
E1
Bytes
1
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The memory location pointed to by SP is stored into L and SP is incremented. The memory location pointed to by SP is stored into H and SP is incremented again.
jp po,nn
Opcode
E2 nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the parity/overflow flag is unset, nn is copied to pc.
ex (sp),hl
Opcode
E3
Bytes
1
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Exchanges (SP) with L, and (SP+1) with H.
call po,nn
Opcode
E4 nn
Bytes
3
Cycles
17/10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the parity/overflow flag is unset, the current pc value plus three is pushed onto the stack, then is loaded with nn.
push hl
Opcode
E5
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
SP is decremented and H is stored into the memory location pointed to by SP. SP is decremented again and L is stored into the memory location pointed to by SP.
and n
Opcode
E6 n
Bytes
2
Cycles
7
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with n.
rst 20h
Opcode
E7
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The current pc value plus one is pushed onto the stack, then is loaded with 32.
ret pe
Opcode
E8
Bytes
1
Cycles
11/5
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the parity/overflow flag is set, the top stack entry is popped into pc.
jp (hl)
Opcode
E9
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value of HL into pc.
jp pe,nn
Opcode
EA nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the parity/overflow flag is set, nn is copied to pc.
ex de,hl
Opcode
EB
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Exchanges the 16-bit contents of DE and HL.
call pe,nn
Opcode
EC nn
Bytes
3
Cycles
17/10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the parity/overflow flag is set, the current pc value plus three is pushed onto the stack, then is loaded with nn.
Misc. xor n
Opcode
EE n
Bytes
2
Cycles
7
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with n.
rst 28h
Opcode
EF
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The current pc value plus one is pushed onto the stack, then is loaded with 40.
F ret p
Opcode
F0
Bytes
1
Cycles
11/5
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the sign flag is unset, the top stack entry is popped into pc.
pop af
Opcode
F1
Bytes
1
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The memory location pointed to by SP is stored into f and SP is incremented. The memory location pointed to by SP is stored into A and SP is incremented again.
jp p,nn
Opcode
F2 nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the sign flag is unset, nn is copied to pc.
di
Opcode
F3
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets both interrupt flip-flops, thus prenting maskable interrupts from triggering.
call p,nn
Opcode
F4 nn
Bytes
3
Cycles
17/10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the sign flag is unset, the current pc value plus three is pushed onto the stack, then is loaded with nn.
push af
Opcode
F5
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
SP is decremented and A is stored into the memory location pointed to by SP. SP is decremented again and f is stored into the memory location pointed to by SP.
or n
Opcode
F6 n
Bytes
2
Cycles
7
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with n.
rst 30h
Opcode
F7
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The current pc value plus one is pushed onto the stack, then is loaded with 48.
ret m
Opcode
F8
Bytes
1
Cycles
11/5
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the sign flag is set, the top stack entry is popped into pc.
ld sp,hl
Opcode
F9
Bytes
1
Cycles
6
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value of HL into SP.
jp m,nn
Opcode
FA nn
Bytes
3
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the sign flag is set, nn is copied to pc.
ei
Opcode
FB
Bytes
1
Cycles
4
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets both interrupt flip-flops, thus allowing maskable interrupts to occur. An interrupt will not occur until after the immediatediyl following instruction.
call m,nn
Opcode
FC nn
Bytes
3
Cycles
17/10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
If the sign flag is set, the current pc value plus three is pushed onto the stack, then is loaded with nn.
IY cp n
Opcode
FE n
Bytes
2
Cycles
7
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts n from A and affects flags according to the result. A is not modified.
rst 38h
Opcode
FF
Bytes
1
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The current pc value plus one is pushed onto the stack, then is loaded with 56.

Bit Instructions (CB)

0 1 2 3 4 5 6 7 8 9 A B C D E F
0 rlc b
Opcode
CB 00
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of B are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rlc c
Opcode
CB 01
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of C are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rlc d
Opcode
CB 02
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of D are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rlc e
Opcode
CB 03
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of E are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rlc h
Opcode
CB 04
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of H are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rlc l
Opcode
CB 05
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of L are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rlc (hl)
Opcode
CB 06
Bytes
2
Cycles
15
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of (HL) are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rlc a
Opcode
CB 07
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of A are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rrc b
Opcode
CB 08
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of B are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
rrc c
Opcode
CB 09
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of C are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
rrc d
Opcode
CB 0A
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of D are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
rrc e
Opcode
CB 0B
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of E are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
rrc h
Opcode
CB 0C
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of H are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
rrc l
Opcode
CB 0D
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of L are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
rrc (hl)
Opcode
CB 0E
Bytes
2
Cycles
15
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of (HL) are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
rrc a
Opcode
CB 0F
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of A are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
1 rl b
Opcode
CB 10
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of B are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rl c
Opcode
CB 11
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of C are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rl d
Opcode
CB 12
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of D are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rl e
Opcode
CB 13
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of E are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rl h
Opcode
CB 14
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of H are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rl l
Opcode
CB 15
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of L are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rl (hl)
Opcode
CB 16
Bytes
2
Cycles
15
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of (HL) are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rl a
Opcode
CB 17
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of A are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rr b
Opcode
CB 18
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of B are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
rr c
Opcode
CB 19
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of C are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
rr d
Opcode
CB 1A
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of D are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
rr e
Opcode
CB 1B
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of E are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
rr h
Opcode
CB 1C
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of H are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
rr l
Opcode
CB 1D
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of L are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
rr (hl)
Opcode
CB 1E
Bytes
2
Cycles
15
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of (HL) are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
rr a
Opcode
CB 1F
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of A are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
2 sla b
Opcode
CB 20
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of B are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
sla c
Opcode
CB 21
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of C are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
sla d
Opcode
CB 22
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of D are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
sla e
Opcode
CB 23
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of E are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
sla h
Opcode
CB 24
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of H are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
sla l
Opcode
CB 25
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of L are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
sla (hl)
Opcode
CB 26
Bytes
2
Cycles
15
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of (HL) are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
sla a
Opcode
CB 27
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of A are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
sra b
Opcode
CB 28
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of B are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
sra c
Opcode
CB 29
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of C are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
sra d
Opcode
CB 2A
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of D are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
sra e
Opcode
CB 2B
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of E are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
sra h
Opcode
CB 2C
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of H are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
sra l
Opcode
CB 2D
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of L are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
sra (hl)
Opcode
CB 2E
Bytes
2
Cycles
15
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of (HL) are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
sra a
Opcode
CB 2F
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of A are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
3 sll b
Opcode
CB 30
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of B are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
sll c
Opcode
CB 31
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of C are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
sll d
Opcode
CB 32
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of D are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
sll e
Opcode
CB 33
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of E are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
sll h
Opcode
CB 34
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of H are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
sll l
Opcode
CB 35
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of L are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
sll (hl)
Opcode
CB 36
Bytes
2
Cycles
15
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of (HL) are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
sll a
Opcode
CB 37
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of A are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
srl b
Opcode
CB 38
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of B are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
srl c
Opcode
CB 39
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of C are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
srl d
Opcode
CB 3A
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of D are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
srl e
Opcode
CB 3B
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of E are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
srl h
Opcode
CB 3C
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of H are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
srl l
Opcode
CB 3D
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of L are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
srl (hl)
Opcode
CB 3E
Bytes
2
Cycles
15
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of (HL) are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
srl a
Opcode
CB 3F
Bytes
2
Cycles
8
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of A are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
4 bit 0,b
Opcode
CB 40
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of B.
bit 0,c
Opcode
CB 41
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of C.
bit 0,d
Opcode
CB 42
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of D.
bit 0,e
Opcode
CB 43
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of E.
bit 0,h
Opcode
CB 44
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of H.
bit 0,l
Opcode
CB 45
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of L.
bit 0,(hl)
Opcode
CB 46
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of (HL).
bit 0,a
Opcode
CB 47
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of A.
bit 1,b
Opcode
CB 48
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of B.
bit 1,c
Opcode
CB 49
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of C.
bit 1,d
Opcode
CB 4A
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of D.
bit 1,e
Opcode
CB 4B
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of E.
bit 1,h
Opcode
CB 4C
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of H.
bit 1,l
Opcode
CB 4D
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of L.
bit 1,(hl)
Opcode
CB 4E
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of (HL).
bit 1,a
Opcode
CB 4F
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of A.
5 bit 2,b
Opcode
CB 50
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of B.
bit 2,c
Opcode
CB 51
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of C.
bit 2,d
Opcode
CB 52
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of D.
bit 2,e
Opcode
CB 53
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of E.
bit 2,h
Opcode
CB 54
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of H.
bit 2,l
Opcode
CB 55
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of L.
bit 2,(hl)
Opcode
CB 56
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of (HL).
bit 2,a
Opcode
CB 57
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of A.
bit 3,b
Opcode
CB 58
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of B.
bit 3,c
Opcode
CB 59
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of C.
bit 3,d
Opcode
CB 5A
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of D.
bit 3,e
Opcode
CB 5B
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of E.
bit 3,h
Opcode
CB 5C
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of H.
bit 3,l
Opcode
CB 5D
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of L.
bit 3,(hl)
Opcode
CB 5E
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of (HL).
bit 3,a
Opcode
CB 5F
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of A.
6 bit 4,b
Opcode
CB 60
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of B.
bit 4,c
Opcode
CB 61
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of C.
bit 4,d
Opcode
CB 62
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of D.
bit 4,e
Opcode
CB 63
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of E.
bit 4,h
Opcode
CB 64
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of H.
bit 4,l
Opcode
CB 65
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of L.
bit 4,(hl)
Opcode
CB 66
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of (HL).
bit 4,a
Opcode
CB 67
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of A.
bit 5,b
Opcode
CB 68
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of B.
bit 5,c
Opcode
CB 69
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of C.
bit 5,d
Opcode
CB 6A
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of D.
bit 5,e
Opcode
CB 6B
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of E.
bit 5,h
Opcode
CB 6C
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of H.
bit 5,l
Opcode
CB 6D
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of L.
bit 5,(hl)
Opcode
CB 6E
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of (HL).
bit 5,a
Opcode
CB 6F
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of A.
7 bit 6,b
Opcode
CB 70
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of B.
bit 6,c
Opcode
CB 71
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of C.
bit 6,d
Opcode
CB 72
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of D.
bit 6,e
Opcode
CB 73
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of E.
bit 6,h
Opcode
CB 74
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of H.
bit 6,l
Opcode
CB 75
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of L.
bit 6,(hl)
Opcode
CB 76
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of (HL).
bit 6,a
Opcode
CB 77
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of A.
bit 7,b
Opcode
CB 78
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of B.
bit 7,c
Opcode
CB 79
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of C.
bit 7,d
Opcode
CB 7A
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of D.
bit 7,e
Opcode
CB 7B
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of E.
bit 7,h
Opcode
CB 7C
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of H.
bit 7,l
Opcode
CB 7D
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of L.
bit 7,(hl)
Opcode
CB 7E
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of (HL).
bit 7,a
Opcode
CB 7F
Bytes
2
Cycles
8
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of A.
8 res 0,b
Opcode
CB 80
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of B.
res 0,c
Opcode
CB 81
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of C.
res 0,d
Opcode
CB 82
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of D.
res 0,e
Opcode
CB 83
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of E.
res 0,h
Opcode
CB 84
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of H.
res 0,l
Opcode
CB 85
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of L.
res 0,(hl)
Opcode
CB 86
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of (HL).
res 0,a
Opcode
CB 87
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of A.
res 1,b
Opcode
CB 88
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of B.
res 1,c
Opcode
CB 89
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of C.
res 1,d
Opcode
CB 8A
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of D.
res 1,e
Opcode
CB 8B
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of E.
res 1,h
Opcode
CB 8C
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of H.
res 1,l
Opcode
CB 8D
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of L.
res 1,(hl)
Opcode
CB 8E
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of (HL).
res 1,a
Opcode
CB 8F
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of A.
9 res 2,b
Opcode
CB 90
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of B.
res 2,c
Opcode
CB 91
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of C.
res 2,d
Opcode
CB 92
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of D.
res 2,e
Opcode
CB 93
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of E.
res 2,h
Opcode
CB 94
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of H.
res 2,l
Opcode
CB 95
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of L.
res 2,(hl)
Opcode
CB 96
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of (HL).
res 2,a
Opcode
CB 97
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of A.
res 3,b
Opcode
CB 98
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of B.
res 3,c
Opcode
CB 99
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of C.
res 3,d
Opcode
CB 9A
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of D.
res 3,e
Opcode
CB 9B
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of E.
res 3,h
Opcode
CB 9C
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of H.
res 3,l
Opcode
CB 9D
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of L.
res 3,(hl)
Opcode
CB 9E
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of (HL).
res 3,a
Opcode
CB 9F
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of A.
A res 4,b
Opcode
CB A0
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of B.
res 4,c
Opcode
CB A1
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of C.
res 4,d
Opcode
CB A2
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of D.
res 4,e
Opcode
CB A3
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of E.
res 4,h
Opcode
CB A4
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of H.
res 4,l
Opcode
CB A5
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of L.
res 4,(hl)
Opcode
CB A6
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of (HL).
res 4,a
Opcode
CB A7
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of A.
res 5,b
Opcode
CB A8
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of B.
res 5,c
Opcode
CB A9
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of C.
res 5,d
Opcode
CB AA
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of D.
res 5,e
Opcode
CB AB
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of E.
res 5,h
Opcode
CB AC
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of H.
res 5,l
Opcode
CB AD
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of L.
res 5,(hl)
Opcode
CB AE
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of (HL).
res 5,a
Opcode
CB AF
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of A.
B res 6,b
Opcode
CB B0
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of B.
res 6,c
Opcode
CB B1
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of C.
res 6,d
Opcode
CB B2
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of D.
res 6,e
Opcode
CB B3
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of E.
res 6,h
Opcode
CB B4
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of H.
res 6,l
Opcode
CB B5
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of L.
res 6,(hl)
Opcode
CB B6
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of (HL).
res 6,a
Opcode
CB B7
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of A.
res 7,b
Opcode
CB B8
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of B.
res 7,c
Opcode
CB B9
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of C.
res 7,d
Opcode
CB BA
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of D.
res 7,e
Opcode
CB BB
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of E.
res 7,h
Opcode
CB BC
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of H.
res 7,l
Opcode
CB BD
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of L.
res 7,(hl)
Opcode
CB BE
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of (HL).
res 7,a
Opcode
CB BF
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of A.
C set 0,b
Opcode
CB C0
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of B.
set 0,c
Opcode
CB C1
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of C.
set 0,d
Opcode
CB C2
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of D.
set 0,e
Opcode
CB C3
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of E.
set 0,h
Opcode
CB C4
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of H.
set 0,l
Opcode
CB C5
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of L.
set 0,(hl)
Opcode
CB C6
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of (HL).
set 0,a
Opcode
CB C7
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of A.
set 1,b
Opcode
CB C8
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of B.
set 1,c
Opcode
CB C9
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of C.
set 1,d
Opcode
CB CA
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of D.
set 1,e
Opcode
CB CB
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of E.
set 1,h
Opcode
CB CC
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of H.
set 1,l
Opcode
CB CD
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of L.
set 1,(hl)
Opcode
CB CE
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of (HL).
set 1,a
Opcode
CB CF
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of A.
D set 2,b
Opcode
CB D0
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of B.
set 2,c
Opcode
CB D1
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of C.
set 2,d
Opcode
CB D2
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of D.
set 2,e
Opcode
CB D3
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of E.
set 2,h
Opcode
CB D4
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of H.
set 2,l
Opcode
CB D5
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of L.
set 2,(hl)
Opcode
CB D6
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of (HL).
set 2,a
Opcode
CB D7
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of A.
set 3,b
Opcode
CB D8
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of B.
set 3,c
Opcode
CB D9
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of C.
set 3,d
Opcode
CB DA
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of D.
set 3,e
Opcode
CB DB
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of E.
set 3,h
Opcode
CB DC
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of H.
set 3,l
Opcode
CB DD
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of L.
set 3,(hl)
Opcode
CB DE
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of (HL).
set 3,a
Opcode
CB DF
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of A.
E set 4,b
Opcode
CB E0
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of B.
set 4,c
Opcode
CB E1
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of C.
set 4,d
Opcode
CB E2
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of D.
set 4,e
Opcode
CB E3
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of E.
set 4,h
Opcode
CB E4
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of H.
set 4,l
Opcode
CB E5
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of L.
set 4,(hl)
Opcode
CB E6
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of (HL).
set 4,a
Opcode
CB E7
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of A.
set 5,b
Opcode
CB E8
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of B.
set 5,c
Opcode
CB E9
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of C.
set 5,d
Opcode
CB EA
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of D.
set 5,e
Opcode
CB EB
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of E.
set 5,h
Opcode
CB EC
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of H.
set 5,l
Opcode
CB ED
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of L.
set 5,(hl)
Opcode
CB EE
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of (HL).
set 5,a
Opcode
CB EF
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of A.
F set 6,b
Opcode
CB F0
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of B.
set 6,c
Opcode
CB F1
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of C.
set 6,d
Opcode
CB F2
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of D.
set 6,e
Opcode
CB F3
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of E.
set 6,h
Opcode
CB F4
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of H.
set 6,l
Opcode
CB F5
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of L.
set 6,(hl)
Opcode
CB F6
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of (HL).
set 6,a
Opcode
CB F7
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of A.
set 7,b
Opcode
CB F8
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of B.
set 7,c
Opcode
CB F9
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of C.
set 7,d
Opcode
CB FA
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of D.
set 7,e
Opcode
CB FB
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of E.
set 7,h
Opcode
CB FC
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of H.
set 7,l
Opcode
CB FD
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of L.
set 7,(hl)
Opcode
CB FE
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of (HL).
set 7,a
Opcode
CB FF
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of A.

IX Instructions (DD)

0 1 2 3 4 5 6 7 8 9 A B C D E F
0 inc b
Opcode
DD 04
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec b
Opcode
DD 05
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from B.
ld b,n
Opcode
DD 06 n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into B.
add ix,bc
Opcode
DD 09
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of BC is added to IX.
inc c
Opcode
DD 0C
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec c
Opcode
DD 0D
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from C.
ld c,n
Opcode
DD 0E n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into C.
1 inc d
Opcode
DD 14
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec d
Opcode
DD 15
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from D.
ld d,n
Opcode
DD 16 n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into D.
add ix,de
Opcode
DD 19
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of DE is added to IX.
inc e
Opcode
DD 1C
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec e
Opcode
DD 1D
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from E.
ld e,n
Opcode
DD 1E n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into E.
2 ld ix,nn
Opcode
DD 21 nn
Bytes
4
Cycles
14
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads nn into register IX.
ld (nn),ix
Opcode
DD 22 nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores IX into the memory location pointed to by nn.
inc ix
Opcode
DD 23
Bytes
2
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Adds one to IX.
inc ixh
Opcode
DD 24
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec ixh
Opcode
DD 25
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from IXH.
ld ixh,n
Opcode
DD 26 n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into IXH.
add ix,ix
Opcode
DD 29
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of IX is added to IX.
ld ix,(nn)
Opcode
DD 2A nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by nn into IX.
dec ix
Opcode
DD 2B
Bytes
2
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Subtracts one from IX.
inc ixl
Opcode
DD 2C
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec ixl
Opcode
DD 2D
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from IXL.
ld ixl,n
Opcode
DD 2E n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into IXL.
3 inc (ix+d)
Opcode
DD 34 d
Bytes
3
Cycles
23
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to the memory location pointed to by IX plus d.
dec (ix+d)
Opcode
DD 35 d
Bytes
3
Cycles
23
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from the memory location pointed to by IX plus d.
ld (ix+d),n
Opcode
DD 36 d n
Bytes
4
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores n to the memory location pointed to by IX plus d.
add ix,sp
Opcode
DD 39
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of SP is added to IX.
inc a
Opcode
DD 3C
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec a
Opcode
DD 3D
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from A.
ld a,n
Opcode
DD 3E n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into A.
4 ld b,b
Opcode
DD 40
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into B.
ld b,c
Opcode
DD 41
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into B.
ld b,d
Opcode
DD 42
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into B.
ld b,e
Opcode
DD 43
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into B.
ld b,ixh
Opcode
DD 44
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXH are loaded into B.
ld b,ixl
Opcode
DD 45
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXL are loaded into B.
ld b,(ix+d)
Opcode
DD 46 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IX plus d into B.
ld b,a
Opcode
DD 47
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into B.
ld c,b
Opcode
DD 48
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into C.
ld c,c
Opcode
DD 49
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into C.
ld c,d
Opcode
DD 4A
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into C.
ld c,e
Opcode
DD 4B
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into C.
ld c,ixh
Opcode
DD 4C
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXH are loaded into C.
ld c,ixl
Opcode
DD 4D
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXL are loaded into C.
ld c,(ix+d)
Opcode
DD 4E d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IX plus d into C.
ld c,a
Opcode
DD 4F
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into C.
5 ld d,b
Opcode
DD 50
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into D.
ld d,c
Opcode
DD 51
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into D.
ld d,d
Opcode
DD 52
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into D.
ld d,e
Opcode
DD 53
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into D.
ld d,ixh
Opcode
DD 54
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXH are loaded into D.
ld d,ixl
Opcode
DD 55
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXL are loaded into D.
ld d,(ix+d)
Opcode
DD 56 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IX plus d into D.
ld d,a
Opcode
DD 57
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into D.
ld e,b
Opcode
DD 58
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into E.
ld e,c
Opcode
DD 59
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into E.
ld e,d
Opcode
DD 5A
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into E.
ld e,e
Opcode
DD 5B
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into E.
ld e,ixh
Opcode
DD 5C
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXH are loaded into E.
ld e,ixl
Opcode
DD 5D
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXL are loaded into E.
ld e,(ix+d)
Opcode
DD 5E d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IX plus d into E.
ld e,a
Opcode
DD 5F
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into E.
6 ld ixh,b
Opcode
DD 60
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into IXH.
ld ixh,c
Opcode
DD 61
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into IXH.
ld ixh,d
Opcode
DD 62
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into IXH.
ld ixh,e
Opcode
DD 63
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into IXH.
ld ixh,ixh
Opcode
DD 64
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXH are loaded into IXH.
ld ixh,ixl
Opcode
DD 65
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXL are loaded into IXH.
ld h,(ix+d)
Opcode
DD 66 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IX plus d into H.
ld ixh,a
Opcode
DD 67
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into IXH.
ld ixl,b
Opcode
DD 68
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into IXL.
ld ixl,c
Opcode
DD 69
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into IXL.
ld ixl,d
Opcode
DD 6A
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into IXL.
ld ixl,e
Opcode
DD 6B
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into IXL.
ld ixl,ixh
Opcode
DD 6C
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXH are loaded into IXL.
ld ixl,ixl
Opcode
DD 6D
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXL are loaded into IXL.
ld l,(ix+d)
Opcode
DD 6E d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IX plus d into L.
ld ixl,a
Opcode
DD 6F
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into IXL.
7 ld (ix+d),b
Opcode
DD 70 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores B to the memory location pointed to by IX plus d.
ld (ix+d),c
Opcode
DD 71 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores C to the memory location pointed to by IX plus d.
ld (ix+d),d
Opcode
DD 72 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores D to the memory location pointed to by IX plus d.
ld (ix+d),e
Opcode
DD 73 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores E to the memory location pointed to by IX plus d.
ld (ix+d),h
Opcode
DD 74 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores H to the memory location pointed to by IX plus d.
ld (ix+d),l
Opcode
DD 75 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores L to the memory location pointed to by IX plus d.
ld (ix+d),a
Opcode
DD 77 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores A to the memory location pointed to by IX plus d.
ld a,b
Opcode
DD 78
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into A.
ld a,c
Opcode
DD 79
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into A.
ld a,d
Opcode
DD 7A
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into A.
ld a,e
Opcode
DD 7B
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into A.
ld a,ixh
Opcode
DD 7C
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXH are loaded into A.
ld a,ixl
Opcode
DD 7D
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IXL are loaded into A.
ld a,(ix+d)
Opcode
DD 7E d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IX plus d into A.
ld a,a
Opcode
DD 7F
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into A.
8 add a,b
Opcode
DD 80
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds B to A.
add a,c
Opcode
DD 81
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds C to A.
add a,d
Opcode
DD 82
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds D to A.
add a,e
Opcode
DD 83
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds E to A.
add a,ixh
Opcode
DD 84
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds IXH to A.
add a,ixl
Opcode
DD 85
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds IXL to A.
add a,(ix+d)
Opcode
DD 86 d
Bytes
3
Cycles
19
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds the value pointed to by IX plus d to A.
add a,a
Opcode
DD 87
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds A to A.
adc a,b
Opcode
DD 88
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds B and the carry flag to A.
adc a,c
Opcode
DD 89
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds C and the carry flag to A.
adc a,d
Opcode
DD 8A
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds D and the carry flag to A.
adc a,e
Opcode
DD 8B
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds E and the carry flag to A.
adc a,ixh
Opcode
DD 8C
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds IXH and the carry flag to A.
adc a,ixl
Opcode
DD 8D
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds IXL and the carry flag to A.
adc a,(ix+d)
Opcode
DD 8E d
Bytes
3
Cycles
19
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds the value pointed to by IX plus d and the carry flag to A.
adc a,a
Opcode
DD 8F
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds A and the carry flag to A.
9 sub b
Opcode
DD 90
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts B from A.
sub c
Opcode
DD 91
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts C from A.
sub d
Opcode
DD 92
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts D from A.
sub e
Opcode
DD 93
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts E from A.
sub ixh
Opcode
DD 94
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IXH from A.
sub ixl
Opcode
DD 95
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IXL from A.
sub (ix+d)
Opcode
DD 96 d
Bytes
3
Cycles
19
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts the value pointed to by IX plus d from A.
sub a
Opcode
DD 97
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts A from A.
sbc a,b
Opcode
DD 98
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts B and the carry flag from A.
sbc a,c
Opcode
DD 99
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts C and the carry flag from A.
sbc a,d
Opcode
DD 9A
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts D and the carry flag from A.
sbc a,e
Opcode
DD 9B
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts E and the carry flag from A.
sbc a,ixh
Opcode
DD 9C
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IXH and the carry flag from A.
sbc a,ixl
Opcode
DD 9D
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IXL and the carry flag from A.
sbc a,(ix+d)
Opcode
DD 9E d
Bytes
3
Cycles
19
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts the value pointed to by IX plus d and the carry flag from A.
sbc a,a
Opcode
DD 9F
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts A and the carry flag from A.
A and b
Opcode
DD A0
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with B.
and c
Opcode
DD A1
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with C.
and d
Opcode
DD A2
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with D.
and e
Opcode
DD A3
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with E.
and ixh
Opcode
DD A4
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with IXH.
and ixl
Opcode
DD A5
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with IXL.
and (ix+d)
Opcode
DD A6 d
Bytes
3
Cycles
19
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with the value pointed to by IX plus d.
and a
Opcode
DD A7
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with A.
xor b
Opcode
DD A8
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with B.
xor c
Opcode
DD A9
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with C.
xor d
Opcode
DD AA
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with D.
xor e
Opcode
DD AB
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with E.
xor ixh
Opcode
DD AC
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with IXH.
xor ixl
Opcode
DD AD
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with IXL.
xor (ix+d)
Opcode
DD AE d
Bytes
3
Cycles
19
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with the value pointed to by IX plus d.
xor a
Opcode
DD AF
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with A.
B or b
Opcode
DD B0
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or c
Opcode
DD B1
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or d
Opcode
DD B2
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or e
Opcode
DD B3
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or ixh
Opcode
DD B4
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or ixl
Opcode
DD B5
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or (ix+d)
Opcode
DD B6 d
Bytes
3
Cycles
19
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with the value pointed to by IX plus d.
or a
Opcode
DD B7
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
cp b
Opcode
DD B8
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts B from A and affects flags according to the result. A is not modified.
cp c
Opcode
DD B9
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts C from A and affects flags according to the result. A is not modified.
cp d
Opcode
DD BA
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts D from A and affects flags according to the result. A is not modified.
cp e
Opcode
DD BB
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts E from A and affects flags according to the result. A is not modified.
cp ixh
Opcode
DD BC
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IXH from A and affects flags according to the result. A is not modified.
cp ixl
Opcode
DD BD
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IXL from A and affects flags according to the result. A is not modified.
cp (ix+d)
Opcode
DD BE d
Bytes
3
Cycles
19
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts the value pointed to by IX plus d from A and affects flags according to the result. A is not modified.
cp a
Opcode
DD BF
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts A from A and affects flags according to the result. A is not modified.
C IX Bit
E pop ix
Opcode
DD E1
Bytes
2
Cycles
14
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The memory location pointed to by SP is stored into IXL and SP is incremented. The memory location pointed to by SP is stored into IXH and SP is incremented again.
ex (sp),ix
Opcode
DD E3
Bytes
2
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Exchanges (SP) with IXL, and (SP+1) with IXH.
push ix
Opcode
DD E5
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
SP is decremented and IXH is stored into the memory location pointed to by SP. SP is decremented again and IXL is stored into the memory location pointed to by SP.
jp (ix)
Opcode
DD E9
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value of IX into pc.
F ld sp,ix
Opcode
DD F9
Bytes
2
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value of IX into SP.

IX Bit Instructions (DDCB)

0 1 2 3 4 5 6 7 8 9 A B C D E F
0 rlc (ix+d),b
Opcode
DD CB d 00
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in B.
rlc (ix+d),c
Opcode
DD CB d 01
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in C.
rlc (ix+d),d
Opcode
DD CB d 02
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in D.
rlc (ix+d),e
Opcode
DD CB d 03
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in E.
rlc (ix+d),h
Opcode
DD CB d 04
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in H.
rlc (ix+d),l
Opcode
DD CB d 05
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in L.
rlc (ix+d)
Opcode
DD CB d 06
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rlc (ix+d),a
Opcode
DD CB d 07
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in A.
rrc (ix+d),b
Opcode
DD CB d 08
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in B.
rrc (ix+d),c
Opcode
DD CB d 09
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in C.
rrc (ix+d),d
Opcode
DD CB d 0A
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in D.
rrc (ix+d),e
Opcode
DD CB d 0B
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in E.
rrc (ix+d),h
Opcode
DD CB d 0C
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in H.
rrc (ix+d),l
Opcode
DD CB d 0D
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in L.
rrc (ix+d)
Opcode
DD CB d 0E
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
rrc (ix+d),a
Opcode
DD CB d 0F
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in A.
1 rl (ix+d),b
Opcode
DD CB d 10
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in B.
rl (ix+d),c
Opcode
DD CB d 11
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in C.
rl (ix+d),d
Opcode
DD CB d 12
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in D.
rl (ix+d),e
Opcode
DD CB d 13
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in E.
rl (ix+d),h
Opcode
DD CB d 14
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in H.
rl (ix+d),l
Opcode
DD CB d 15
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in L.
rl (ix+d)
Opcode
DD CB d 16
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rl (ix+d),a
Opcode
DD CB d 17
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in A.
rr (ix+d),b
Opcode
DD CB d 18
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in B.
rr (ix+d),c
Opcode
DD CB d 19
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in C.
rr (ix+d),d
Opcode
DD CB d 1A
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in D.
rr (ix+d),e
Opcode
DD CB d 1B
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in E.
rr (ix+d),h
Opcode
DD CB d 1C
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in H.
rr (ix+d),l
Opcode
DD CB d 1D
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in L.
rr (ix+d)
Opcode
DD CB d 1E
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
rr (ix+d),a
Opcode
DD CB d 1F
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in A.
2 sla (ix+d),b
Opcode
DD CB d 20
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in B.
sla (ix+d),c
Opcode
DD CB d 21
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in C.
sla (ix+d),d
Opcode
DD CB d 22
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in D.
sla (ix+d),e
Opcode
DD CB d 23
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in E.
sla (ix+d),h
Opcode
DD CB d 24
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in H.
sla (ix+d),l
Opcode
DD CB d 25
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in L.
sla (ix+d)
Opcode
DD CB d 26
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
sla (ix+d),a
Opcode
DD CB d 27
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in A.
sra (ix+d),b
Opcode
DD CB d 28
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in B.
sra (ix+d),c
Opcode
DD CB d 29
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in C.
sra (ix+d),d
Opcode
DD CB d 2A
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in D.
sra (ix+d),e
Opcode
DD CB d 2B
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in E.
sra (ix+d),h
Opcode
DD CB d 2C
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in H.
sra (ix+d),l
Opcode
DD CB d 2D
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in L.
sra (ix+d)
Opcode
DD CB d 2E
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
sra (ix+d),a
Opcode
DD CB d 2F
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in A.
3 sll (ix+d),b
Opcode
DD CB d 30
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in B.
sll (ix+d),c
Opcode
DD CB d 31
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in C.
sll (ix+d),d
Opcode
DD CB d 32
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in D.
sll (ix+d),e
Opcode
DD CB d 33
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in E.
sll (ix+d),h
Opcode
DD CB d 34
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in H.
sll (ix+d),l
Opcode
DD CB d 35
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in L.
sll (ix+d)
Opcode
DD CB d 36
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
sll (ix+d),a
Opcode
DD CB d 37
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in A.
srl (ix+d),b
Opcode
DD CB d 38
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in B.
srl (ix+d),c
Opcode
DD CB d 39
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in C.
srl (ix+d),d
Opcode
DD CB d 3A
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in D.
srl (ix+d),e
Opcode
DD CB d 3B
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in E.
srl (ix+d),h
Opcode
DD CB d 3C
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in H.
srl (ix+d),l
Opcode
DD CB d 3D
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in L.
srl (ix+d)
Opcode
DD CB d 3E
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
srl (ix+d),a
Opcode
DD CB d 3F
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IX plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in A.
4 bit 0,(ix+d)
Opcode
DD CB d 40
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IX plus d.
bit 0,(ix+d)
Opcode
DD CB d 41
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IX plus d.
bit 0,(ix+d)
Opcode
DD CB d 42
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IX plus d.
bit 0,(ix+d)
Opcode
DD CB d 43
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IX plus d.
bit 0,(ix+d)
Opcode
DD CB d 44
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IX plus d.
bit 0,(ix+d)
Opcode
DD CB d 45
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IX plus d.
bit 0,(ix+d)
Opcode
DD CB d 46
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IX plus d.
bit 0,(ix+d)
Opcode
DD CB d 47
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IX plus d.
bit 1,(ix+d)
Opcode
DD CB d 48
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IX plus d.
bit 1,(ix+d)
Opcode
DD CB d 49
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IX plus d.
bit 1,(ix+d)
Opcode
DD CB d 4A
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IX plus d.
bit 1,(ix+d)
Opcode
DD CB d 4B
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IX plus d.
bit 1,(ix+d)
Opcode
DD CB d 4C
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IX plus d.
bit 1,(ix+d)
Opcode
DD CB d 4D
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IX plus d.
bit 1,(ix+d)
Opcode
DD CB d 4E
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IX plus d.
bit 1,(ix+d)
Opcode
DD CB d 4F
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IX plus d.
5 bit 2,(ix+d)
Opcode
DD CB d 50
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IX plus d.
bit 2,(ix+d)
Opcode
DD CB d 51
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IX plus d.
bit 2,(ix+d)
Opcode
DD CB d 52
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IX plus d.
bit 2,(ix+d)
Opcode
DD CB d 53
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IX plus d.
bit 2,(ix+d)
Opcode
DD CB d 54
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IX plus d.
bit 2,(ix+d)
Opcode
DD CB d 55
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IX plus d.
bit 2,(ix+d)
Opcode
DD CB d 56
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IX plus d.
bit 2,(ix+d)
Opcode
DD CB d 57
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IX plus d.
bit 3,(ix+d)
Opcode
DD CB d 58
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IX plus d.
bit 3,(ix+d)
Opcode
DD CB d 59
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IX plus d.
bit 3,(ix+d)
Opcode
DD CB d 5A
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IX plus d.
bit 3,(ix+d)
Opcode
DD CB d 5B
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IX plus d.
bit 3,(ix+d)
Opcode
DD CB d 5C
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IX plus d.
bit 3,(ix+d)
Opcode
DD CB d 5D
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IX plus d.
bit 3,(ix+d)
Opcode
DD CB d 5E
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IX plus d.
bit 3,(ix+d)
Opcode
DD CB d 5F
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IX plus d.
6 bit 4,(ix+d)
Opcode
DD CB d 60
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IX plus d.
bit 4,(ix+d)
Opcode
DD CB d 61
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IX plus d.
bit 4,(ix+d)
Opcode
DD CB d 62
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IX plus d.
bit 4,(ix+d)
Opcode
DD CB d 63
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IX plus d.
bit 4,(ix+d)
Opcode
DD CB d 64
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IX plus d.
bit 4,(ix+d)
Opcode
DD CB d 65
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IX plus d.
bit 4,(ix+d)
Opcode
DD CB d 66
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IX plus d.
bit 4,(ix+d)
Opcode
DD CB d 67
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IX plus d.
bit 5,(ix+d)
Opcode
DD CB d 68
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IX plus d.
bit 5,(ix+d)
Opcode
DD CB d 69
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IX plus d.
bit 5,(ix+d)
Opcode
DD CB d 6A
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IX plus d.
bit 5,(ix+d)
Opcode
DD CB d 6B
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IX plus d.
bit 5,(ix+d)
Opcode
DD CB d 6C
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IX plus d.
bit 5,(ix+d)
Opcode
DD CB d 6D
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IX plus d.
bit 5,(ix+d)
Opcode
DD CB d 6E
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IX plus d.
bit 5,(ix+d)
Opcode
DD CB d 6F
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IX plus d.
7 bit 6,(ix+d)
Opcode
DD CB d 70
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IX plus d.
bit 6,(ix+d)
Opcode
DD CB d 71
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IX plus d.
bit 6,(ix+d)
Opcode
DD CB d 72
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IX plus d.
bit 6,(ix+d)
Opcode
DD CB d 73
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IX plus d.
bit 6,(ix+d)
Opcode
DD CB d 74
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IX plus d.
bit 6,(ix+d)
Opcode
DD CB d 75
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IX plus d.
bit 6,(ix+d)
Opcode
DD CB d 76
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IX plus d.
bit 6,(ix+d)
Opcode
DD CB d 77
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IX plus d.
bit 7,(ix+d)
Opcode
DD CB d 78
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IX plus d.
bit 7,(ix+d)
Opcode
DD CB d 79
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IX plus d.
bit 7,(ix+d)
Opcode
DD CB d 7A
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IX plus d.
bit 7,(ix+d)
Opcode
DD CB d 7B
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IX plus d.
bit 7,(ix+d)
Opcode
DD CB d 7C
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IX plus d.
bit 7,(ix+d)
Opcode
DD CB d 7D
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IX plus d.
bit 7,(ix+d)
Opcode
DD CB d 7E
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IX plus d.
bit 7,(ix+d)
Opcode
DD CB d 7F
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IX plus d.
8 res 0,(ix+d),b
Opcode
DD CB d 80
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IX plus d. The result is then stored in B.
res 0,(ix+d),c
Opcode
DD CB d 81
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IX plus d. The result is then stored in C.
res 0,(ix+d),d
Opcode
DD CB d 82
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IX plus d. The result is then stored in D.
res 0,(ix+d),e
Opcode
DD CB d 83
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IX plus d. The result is then stored in E.
res 0,(ix+d),h
Opcode
DD CB d 84
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IX plus d. The result is then stored in H.
res 0,(ix+d),l
Opcode
DD CB d 85
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IX plus d. The result is then stored in L.
res 0,(ix+d)
Opcode
DD CB d 86
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IX plus d.
res 0,(ix+d),a
Opcode
DD CB d 87
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IX plus d. The result is then stored in A.
res 1,(ix+d),b
Opcode
DD CB d 88
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IX plus d. The result is then stored in B.
res 1,(ix+d),c
Opcode
DD CB d 89
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IX plus d. The result is then stored in C.
res 1,(ix+d),d
Opcode
DD CB d 8A
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IX plus d. The result is then stored in D.
res 1,(ix+d),e
Opcode
DD CB d 8B
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IX plus d. The result is then stored in E.
res 1,(ix+d),h
Opcode
DD CB d 8C
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IX plus d. The result is then stored in H.
res 1,(ix+d),l
Opcode
DD CB d 8D
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IX plus d. The result is then stored in L.
res 1,(ix+d)
Opcode
DD CB d 8E
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IX plus d.
res 1,(ix+d),a
Opcode
DD CB d 8F
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IX plus d. The result is then stored in A.
9 res 2,(ix+d),b
Opcode
DD CB d 90
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IX plus d. The result is then stored in B.
res 2,(ix+d),c
Opcode
DD CB d 91
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IX plus d. The result is then stored in C.
res 2,(ix+d),d
Opcode
DD CB d 92
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IX plus d. The result is then stored in D.
res 2,(ix+d),e
Opcode
DD CB d 93
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IX plus d. The result is then stored in E.
res 2,(ix+d),h
Opcode
DD CB d 94
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IX plus d. The result is then stored in H.
res 2,(ix+d),l
Opcode
DD CB d 95
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IX plus d. The result is then stored in L.
res 2,(ix+d)
Opcode
DD CB d 96
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IX plus d.
res 2,(ix+d),a
Opcode
DD CB d 97
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IX plus d. The result is then stored in A.
res 3,(ix+d),b
Opcode
DD CB d 98
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IX plus d. The result is then stored in B.
res 3,(ix+d),c
Opcode
DD CB d 99
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IX plus d. The result is then stored in C.
res 3,(ix+d),d
Opcode
DD CB d 9A
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IX plus d. The result is then stored in D.
res 3,(ix+d),e
Opcode
DD CB d 9B
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IX plus d. The result is then stored in E.
res 3,(ix+d),h
Opcode
DD CB d 9C
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IX plus d. The result is then stored in H.
res 3,(ix+d),l
Opcode
DD CB d 9D
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IX plus d. The result is then stored in L.
res 3,(ix+d)
Opcode
DD CB d 9E
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IX plus d.
res 3,(ix+d),a
Opcode
DD CB d 9F
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IX plus d. The result is then stored in A.
A res 4,(ix+d),b
Opcode
DD CB d A0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IX plus d. The result is then stored in B.
res 4,(ix+d),c
Opcode
DD CB d A1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IX plus d. The result is then stored in C.
res 4,(ix+d),d
Opcode
DD CB d A2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IX plus d. The result is then stored in D.
res 4,(ix+d),e
Opcode
DD CB d A3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IX plus d. The result is then stored in E.
res 4,(ix+d),h
Opcode
DD CB d A4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IX plus d. The result is then stored in H.
res 4,(ix+d),l
Opcode
DD CB d A5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IX plus d. The result is then stored in L.
res 4,(ix+d)
Opcode
DD CB d A6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IX plus d.
res 4,(ix+d),a
Opcode
DD CB d A7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IX plus d. The result is then stored in A.
res 5,(ix+d),b
Opcode
DD CB d A8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IX plus d. The result is then stored in B.
res 5,(ix+d),c
Opcode
DD CB d A9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IX plus d. The result is then stored in C.
res 5,(ix+d),d
Opcode
DD CB d AA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IX plus d. The result is then stored in D.
res 5,(ix+d),e
Opcode
DD CB d AB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IX plus d. The result is then stored in E.
res 5,(ix+d),h
Opcode
DD CB d AC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IX plus d. The result is then stored in H.
res 5,(ix+d),l
Opcode
DD CB d AD
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IX plus d. The result is then stored in L.
res 5,(ix+d)
Opcode
DD CB d AE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IX plus d.
res 5,(ix+d),a
Opcode
DD CB d AF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IX plus d. The result is then stored in A.
B res 6,(ix+d),b
Opcode
DD CB d B0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IX plus d. The result is then stored in B.
res 6,(ix+d),c
Opcode
DD CB d B1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IX plus d. The result is then stored in C.
res 6,(ix+d),d
Opcode
DD CB d B2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IX plus d. The result is then stored in D.
res 6,(ix+d),e
Opcode
DD CB d B3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IX plus d. The result is then stored in E.
res 6,(ix+d),h
Opcode
DD CB d B4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IX plus d. The result is then stored in H.
res 6,(ix+d),l
Opcode
DD CB d B5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IX plus d. The result is then stored in L.
res 6,(ix+d)
Opcode
DD CB d B6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IX plus d.
res 6,(ix+d),a
Opcode
DD CB d B7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IX plus d. The result is then stored in A.
res 7,(ix+d),b
Opcode
DD CB d B8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IX plus d. The result is then stored in B.
res 7,(ix+d),c
Opcode
DD CB d B9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IX plus d. The result is then stored in C.
res 7,(ix+d),d
Opcode
DD CB d BA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IX plus d. The result is then stored in D.
res 7,(ix+d),e
Opcode
DD CB d BB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IX plus d. The result is then stored in E.
res 7,(ix+d),h
Opcode
DD CB d BC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IX plus d. The result is then stored in H.
res 7,(ix+d),l
Opcode
DD CB d BD
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IX plus d. The result is then stored in L.
res 7,(ix+d)
Opcode
DD CB d BE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IX plus d.
res 7,(ix+d),a
Opcode
DD CB d BF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IX plus d. The result is then stored in A.
C set 0,(ix+d),b
Opcode
DD CB d C0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IX plus d. The result is then stored in B.
set 0,(ix+d),c
Opcode
DD CB d C1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IX plus d. The result is then stored in C.
set 0,(ix+d),d
Opcode
DD CB d C2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IX plus d. The result is then stored in D.
set 0,(ix+d),e
Opcode
DD CB d C3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IX plus d. The result is then stored in E.
set 0,(ix+d),h
Opcode
DD CB d C4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IX plus d. The result is then stored in H.
set 0,(ix+d),l
Opcode
DD CB d C5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IX plus d. The result is then stored in L.
set 0,(ix+d)
Opcode
DD CB d C6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IX plus d.
set 0,(ix+d),a
Opcode
DD CB d C7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IX plus d. The result is then stored in A.
set 1,(ix+d),b
Opcode
DD CB d C8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IX plus d. The result is then stored in B.
set 1,(ix+d),c
Opcode
DD CB d C9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IX plus d. The result is then stored in C.
set 1,(ix+d),d
Opcode
DD CB d CA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IX plus d. The result is then stored in D.
set 1,(ix+d),e
Opcode
DD CB d CB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IX plus d. The result is then stored in E.
set 1,(ix+d),h
Opcode
DD CB d CC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IX plus d. The result is then stored in H.
set 1,(ix+d),l
Opcode
DD CB d CD
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IX plus d. The result is then stored in L.
set 1,(ix+d)
Opcode
DD CB d CE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IX plus d.
set 1,(ix+d),a
Opcode
DD CB d CF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IX plus d. The result is then stored in A.
D set 2,(ix+d),b
Opcode
DD CB d D0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IX plus d. The result is then stored in B.
set 2,(ix+d),c
Opcode
DD CB d D1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IX plus d. The result is then stored in C.
set 2,(ix+d),d
Opcode
DD CB d D2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IX plus d. The result is then stored in D.
set 2,(ix+d),e
Opcode
DD CB d D3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IX plus d. The result is then stored in E.
set 2,(ix+d),h
Opcode
DD CB d D4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IX plus d. The result is then stored in H.
set 2,(ix+d),l
Opcode
DD CB d D5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IX plus d. The result is then stored in L.
set 2,(ix+d)
Opcode
DD CB d D6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IX plus d.
set 2,(ix+d),a
Opcode
DD CB d D7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IX plus d. The result is then stored in A.
set 3,(ix+d),b
Opcode
DD CB d D8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IX plus d. The result is then stored in B.
set 3,(ix+d),c
Opcode
DD CB d D9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IX plus d. The result is then stored in C.
set 3,(ix+d),d
Opcode
DD CB d DA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IX plus d. The result is then stored in D.
set 3,(ix+d),e
Opcode
DD CB d DB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IX plus d. The result is then stored in E.
set 3,(ix+d),h
Opcode
DD CB d DC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IX plus d. The result is then stored in H.
set 3,(ix+d),l
Opcode
DD CB d DD
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IX plus d. The result is then stored in L.
set 3,(ix+d)
Opcode
DD CB d DE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IX plus d.
set 3,(ix+d),a
Opcode
DD CB d DF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IX plus d. The result is then stored in A.
E set 4,(ix+d),b
Opcode
DD CB d E0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IX plus d. The result is then stored in B.
set 4,(ix+d),c
Opcode
DD CB d E1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IX plus d. The result is then stored in C.
set 4,(ix+d),d
Opcode
DD CB d E2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IX plus d. The result is then stored in D.
set 4,(ix+d),e
Opcode
DD CB d E3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IX plus d. The result is then stored in E.
set 4,(ix+d),h
Opcode
DD CB d E4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IX plus d. The result is then stored in H.
set 4,(ix+d),l
Opcode
DD CB d E5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IX plus d. The result is then stored in L.
set 4,(ix+d)
Opcode
DD CB d E6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IX plus d.
set 4,(ix+d),a
Opcode
DD CB d E7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IX plus d. The result is then stored in A.
set 5,(ix+d),b
Opcode
DD CB d E8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IX plus d. The result is then stored in B.
set 5,(ix+d),c
Opcode
DD CB d E9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IX plus d. The result is then stored in C.
set 5,(ix+d),d
Opcode
DD CB d EA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IX plus d. The result is then stored in D.
set 5,(ix+d),e
Opcode
DD CB d EB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IX plus d. The result is then stored in E.
set 5,(ix+d),h
Opcode
DD CB d EC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IX plus d. The result is then stored in H.
set 5,(ix+d),l
Opcode
DD CB d ED
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IX plus d. The result is then stored in L.
set 5,(ix+d)
Opcode
DD CB d EE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IX plus d.
set 5,(ix+d),a
Opcode
DD CB d EF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IX plus d. The result is then stored in A.
F set 6,(ix+d),b
Opcode
DD CB d F0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IX plus d. The result is then stored in B.
set 6,(ix+d),c
Opcode
DD CB d F1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IX plus d. The result is then stored in C.
set 6,(ix+d),d
Opcode
DD CB d F2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IX plus d. The result is then stored in D.
set 6,(ix+d),e
Opcode
DD CB d F3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IX plus d. The result is then stored in E.
set 6,(ix+d),h
Opcode
DD CB d F4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IX plus d. The result is then stored in H.
set 6,(ix+d),l
Opcode
DD CB d F5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IX plus d. The result is then stored in L.
set 6,(ix+d)
Opcode
DD CB d F6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IX plus d.
set 6,(ix+d),a
Opcode
DD CB d F7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IX plus d. The result is then stored in A.
set 7,(ix+d),b
Opcode
DD CB d F8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IX plus d. The result is then stored in B.
set 7,(ix+d),c
Opcode
DD CB d F9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IX plus d. The result is then stored in C.
set 7,(ix+d),d
Opcode
DD CB d FA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IX plus d. The result is then stored in D.
set 7,(ix+d),e
Opcode
DD CB d FB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IX plus d. The result is then stored in E.
set 7,(ix+d),h
Opcode
DD CB d FC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IX plus d. The result is then stored in H.
set 7,(ix+d),l
Opcode
DD CB d FD
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IX plus d. The result is then stored in L.
set 7,(ix+d)
Opcode
DD CB d FE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IX plus d.
set 7,(ix+d),a
Opcode
DD CB d FF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IX plus d. The result is then stored in A.

Misc. Instructions (ED)

0 1 2 3 4 5 6 7 8 9 A B C D E F
0 in0 b,(n)
Opcode
ED 00 n
Bytes
3
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from the port whose address is formed by 00h in the high bits and n in the low bits is written to B.
out0 (n),b
Opcode
ED 01 n
Bytes
3
Cycles
13
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of B is written to the port whose address is formed by 00h in the high bits and n in the low bits.
tst b
Opcode
ED 04
Bytes
2
Cycles
10
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Calculates the bitwise AND of B with A and affects flags according to the result. A is not modified.
in0 c,(n)
Opcode
ED 08 n
Bytes
3
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from the port whose address is formed by 00h in the high bits and n in the low bits is written to C.
out0 (n),c
Opcode
ED 09 n
Bytes
3
Cycles
13
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of C is written to the port whose address is formed by 00h in the high bits and n in the low bits.
tst c
Opcode
ED 0C
Bytes
2
Cycles
10
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Calculates the bitwise AND of C with A and affects flags according to the result. A is not modified.
1 in0 d,(n)
Opcode
ED 10 n
Bytes
3
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from the port whose address is formed by 00h in the high bits and n in the low bits is written to D.
out0 (n),d
Opcode
ED 11 n
Bytes
3
Cycles
13
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of D is written to the port whose address is formed by 00h in the high bits and n in the low bits.
tst d
Opcode
ED 14
Bytes
2
Cycles
10
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Calculates the bitwise AND of D with A and affects flags according to the result. A is not modified.
in0 e,(n)
Opcode
ED 18 n
Bytes
3
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from the port whose address is formed by 00h in the high bits and n in the low bits is written to E.
out0 (n),e
Opcode
ED 19 n
Bytes
3
Cycles
13
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of E is written to the port whose address is formed by 00h in the high bits and n in the low bits.
tst e
Opcode
ED 1C
Bytes
2
Cycles
10
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Calculates the bitwise AND of E with A and affects flags according to the result. A is not modified.
2 in0 h,(n)
Opcode
ED 20 n
Bytes
3
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from the port whose address is formed by 00h in the high bits and n in the low bits is written to H.
out0 (n),h
Opcode
ED 21 n
Bytes
3
Cycles
13
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of H is written to the port whose address is formed by 00h in the high bits and n in the low bits.
tst h
Opcode
ED 24
Bytes
2
Cycles
10
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Calculates the bitwise AND of H with A and affects flags according to the result. A is not modified.
in0 l,(n)
Opcode
ED 28 n
Bytes
3
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from the port whose address is formed by 00h in the high bits and n in the low bits is written to L.
out0 (n),l
Opcode
ED 29 n
Bytes
3
Cycles
13
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of L is written to the port whose address is formed by 00h in the high bits and n in the low bits.
tst l
Opcode
ED 2C
Bytes
2
Cycles
10
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Calculates the bitwise AND of L with A and affects flags according to the result. A is not modified.
3 tst (hl)
Opcode
ED 34
Bytes
2
Cycles
10
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Calculates the bitwise AND of (HL) with A and affects flags according to the result. A is not modified.
in0 a,(n)
Opcode
ED 38 n
Bytes
3
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from the port whose address is formed by 00h in the high bits and n in the low bits is written to A.
out0 (n),a
Opcode
ED 39 n
Bytes
3
Cycles
13
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of A is written to the port whose address is formed by 00h in the high bits and n in the low bits.
tst a
Opcode
ED 3C
Bytes
2
Cycles
10
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Calculates the bitwise AND of A with A and affects flags according to the result. A is not modified.
4 in b,(c)
Opcode
ED 40
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from port C is written to B.
out (c),b
Opcode
ED 41
Bytes
2
Cycles
12
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of B is written to port C.
sbc hl,bc
Opcode
ED 42
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts BC and the carry flag from HL.
ld (nn),bc
Opcode
ED 43 nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores BC into the memory location pointed to by nn.
neg
Opcode
ED 44
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
The contents of A are negated (two's complement). Operation is the same as subtracting A from zero.
retn
Opcode
ED 45
Bytes
2
Cycles
14
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Used at the end of a non-maskable interrupt service routine (located at 0066h) to pop the top stack entry into PC. The value of IFF2 is copied to IFF1 so that maskable interrupts are allowed to continue as before. NMIs are not enabled on the TI.
im 0
Opcode
ED 46
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets interrupt mode 0.
ld i,a
Opcode
ED 47
Bytes
2
Cycles
9
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores the value of A into register I.
in c,(c)
Opcode
ED 48
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from port C is written to C.
out (c),c
Opcode
ED 49
Bytes
2
Cycles
12
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of C is written to port C.
adc hl,bc
Opcode
ED 4A
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds BC and the carry flag to HL.
ld bc,(nn)
Opcode
ED 4B nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by nn into BC.
mlt bc
Opcode
ED 4C
Bytes
2
Cycles
17
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B and C are multiplied and stored in BC.
reti
Opcode
ED 4D
Bytes
2
Cycles
14
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Used at the end of a maskable interrupt service routine. The top stack entry is popped into pc, and signals an I/O device that the interrupt has finished, allowing nested interrupts (not a consideration on the TI).
ld r,a
Opcode
ED 4F
Bytes
2
Cycles
9
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores the value of A into register R.
5 in d,(c)
Opcode
ED 50
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from port C is written to D.
out (c),d
Opcode
ED 51
Bytes
2
Cycles
12
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of D is written to port C.
sbc hl,de
Opcode
ED 52
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts DE and the carry flag from HL.
ld (nn),de
Opcode
ED 53 nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores DE into the memory location pointed to by nn.
im 1
Opcode
ED 56
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets interrupt mode 1.
ld a,i
Opcode
ED 57
Bytes
2
Cycles
9
C
unaffected
N
reset
P/V
exceptional
H
reset
Z
as defined
S
as defined
Stores the value of register I into A.
in e,(c)
Opcode
ED 58
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from port C is written to E.
out (c),e
Opcode
ED 59
Bytes
2
Cycles
12
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of E is written to port C.
adc hl,de
Opcode
ED 5A
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds DE and the carry flag to HL.
ld de,(nn)
Opcode
ED 5B nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by nn into DE.
mlt de
Opcode
ED 5C
Bytes
2
Cycles
17
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D and E are multiplied and stored in DE.
im 2
Opcode
ED 5E
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets interrupt mode 2.
ld a,r
Opcode
ED 5F
Bytes
2
Cycles
9
C
unaffected
N
reset
P/V
exceptional
H
reset
Z
as defined
S
as defined
Stores the value of register R into A.
6 in h,(c)
Opcode
ED 60
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from port C is written to H.
out (c),h
Opcode
ED 61
Bytes
2
Cycles
12
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of H is written to port C.
sbc hl,hl
Opcode
ED 62
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts HL and the carry flag from HL.
ld (nn),hl
Opcode
ED 63 nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores HL into the memory location pointed to by nn.
tst n
Opcode
ED 64 n
Bytes
3
Cycles
10
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Calculates the bitwise AND of n with A and affects flags according to the result. A is not modified.
rrd
Opcode
ED 67
Bytes
2
Cycles
18
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the low-order nibble of (HL) are copied to the low-order nibble of A. The previous contents are copied to the high-order nibble of (HL). The previous contents are copied to the low-order nibble of (HL).
in l,(c)
Opcode
ED 68
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from port C is written to L.
out (c),l
Opcode
ED 69
Bytes
2
Cycles
12
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of L is written to port C.
adc hl,hl
Opcode
ED 6A
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds HL and the carry flag to HL.
ld hl,(nn)
Opcode
ED 6B nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by nn into DE.
mlt hl
Opcode
ED 6C
Bytes
2
Cycles
17
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of H and L are multiplied and stored in HL.
rld
Opcode
ED 6F
Bytes
2
Cycles
18
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the low-order nibble of (HL) are copied to the high-order nibble of (HL). The previous contents are copied to the low-order nibble of A. The previous contents are copied to the low-order nibble of (HL).
7 in (c)
Opcode
ED 70
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Inputs a byte from port C and affects flags only.
out (c),0
Opcode
ED 71
Bytes
2
Cycles
12
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Outputs a zero to port C.
sbc hl,sp
Opcode
ED 72
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts SP and the carry flag from HL.
ld (nn),sp
Opcode
ED 73 nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores SP into the memory location pointed to by nn.
tstio n
Opcode
ED 74 n
Bytes
3
Cycles
12
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Calculates the bitwise AND of n with (C) and affects flags according to the result. (C) is not modified.
slp
Opcode
ED 76
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The CPU enters SLEEP mode.
in a,(c)
Opcode
ED 78
Bytes
2
Cycles
12
C
unaffected
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
A byte from port C is written to A.
out (c),a
Opcode
ED 79
Bytes
2
Cycles
12
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The value of A is written to port C.
adc hl,sp
Opcode
ED 7A
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds SP and the carry flag to HL.
ld sp,(nn)
Opcode
ED 7B nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by nn into SP.
mlt sp
Opcode
ED 7C
Bytes
2
Cycles
17
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of SPH and SPL are multiplied and stored in SP.
8 otim
Opcode
ED 83
Bytes
2
Cycles
14
C
as defined
N
exceptional
P/V
detects parity
H
as defined
Z
exceptional
S
as defined
A byte from the memory location pointed to by HL is written to port C. Then HL and C are incremented and B is decremented.
otdm
Opcode
ED 8B
Bytes
2
Cycles
14
C
as defined
N
exceptional
P/V
detects parity
H
as defined
Z
exceptional
S
as defined
A byte from the memory location pointed to by HL is written to port C. Then HL, B, and C are decremented.
9 otimr
Opcode
ED 93
Bytes
2
Cycles
16/14
C
reset
N
exceptional
P/V
set
H
reset
Z
set
S
reset
A byte from the memory location pointed to by HL is written to port C. Then HL and C are incremented and B is decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing.
otdmr
Opcode
ED 9B
Bytes
2
Cycles
16/14
C
reset
N
exceptional
P/V
set
H
reset
Z
set
S
reset
A byte from the memory location pointed to by HL is written to port C. Then HL, B, and C are decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing.
A ldi
Opcode
ED A0
Bytes
2
Cycles
16
C
unaffected
N
reset
P/V
exceptional
H
reset
Z
unaffected
S
unaffected
Transfers a byte of data from the memory location pointed to by HL to the memory location pointed to by DE. Then HL and DE are incremented and BC is decremented.
cpi
Opcode
ED A1
Bytes
2
Cycles
16
C
unaffected
N
set
P/V
exceptional
H
as defined
Z
as defined
S
as defined
Compares the value of the memory location pointed to by HL with A. Then HL is incremented and BC is decremented.
ini
Opcode
ED A2
Bytes
2
Cycles
16
C
unaffected
N
set
P/V
undefined
H
undefined
Z
exceptional
S
undefined
A byte from port C is written to the memory location pointed to by HL. Then HL is incremented and B is decremented.
outi
Opcode
ED A3
Bytes
2
Cycles
16
C
unaffected
N
set
P/V
undefined
H
undefined
Z
exceptional
S
undefined
A byte from the memory location pointed to by HL is written to port C. Then HL is incremented and B is decremented.
ldd
Opcode
ED A8
Bytes
2
Cycles
16
C
unaffected
N
reset
P/V
exceptional
H
reset
Z
unaffected
S
unaffected
Transfers a byte of data from the memory location pointed to by HL to the memory location pointed to by DE. Then HL, DE, and BC are decremented.
cpd
Opcode
ED A9
Bytes
2
Cycles
16
C
unaffected
N
set
P/V
exceptional
H
as defined
Z
as defined
S
as defined
Compares the value of the memory location pointed to by HL with A. Then HL and BC are decremented.
ind
Opcode
ED AA
Bytes
2
Cycles
16
C
unaffected
N
set
P/V
undefined
H
undefined
Z
exceptional
S
undefined
A byte from port C is written to the memory location pointed to by HL. Then HL and B are decremented.
outd
Opcode
ED AB
Bytes
2
Cycles
16
C
unaffected
N
set
P/V
undefined
H
undefined
Z
exceptional
S
undefined
A byte from the memory location pointed to by HL is written to port C. Then HL and B are decremented.
B ldir
Opcode
ED B0
Bytes
2
Cycles
21/16
C
unaffected
N
reset
P/V
reset
H
reset
Z
unaffected
S
unaffected
Transfers a byte of data from the memory location pointed to by HL to the memory location pointed to by DE. Then HL and DE are incremented and BC is decremented. If BC is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing.
cpir
Opcode
ED B1
Bytes
2
Cycles
21/16
C
unaffected
N
set
P/V
reset
H
as defined
Z
as defined
S
as defined
Compares the value of the memory location pointed to by HL with A. Then HL is incremented and BC is decremented. If BC is not zero and z is not set, this operation is repeated. Interrupts can trigger while this instruction is processing.
inir
Opcode
ED B2
Bytes
2
Cycles
21/16
C
unaffected
N
set
P/V
undefined
H
undefined
Z
set
S
undefined
A byte from port C is written to the memory location pointed to by HL. Then HL is incremented and B is decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing.
otir
Opcode
ED B3
Bytes
2
Cycles
21/16
C
unaffected
N
set
P/V
undefined
H
undefined
Z
set
S
undefined
A byte from the memory location pointed to by HL is written to port C. Then HL is incremented and B is decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing.
lddr
Opcode
ED B8
Bytes
2
Cycles
21/16
C
unaffected
N
reset
P/V
reset
H
reset
Z
unaffected
S
unaffected
Transfers a byte of data from the memory location pointed to by HL to the memory location pointed to by DE. Then HL, DE, and BC are decremented. If BC is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing.
cpdr
Opcode
ED B9
Bytes
2
Cycles
21/16
C
unaffected
N
set
P/V
reset
H
as defined
Z
as defined
S
as defined
Compares the value of the memory location pointed to by HL with A. Then HL and BC are decremented. If BC is not zero and z is not set, this operation is repeated. Interrupts can trigger while this instruction is processing.
indr
Opcode
ED BA
Bytes
2
Cycles
21/16
C
unaffected
N
set
P/V
undefined
H
undefined
Z
set
S
undefined
A byte from port C is written to the memory location pointed to by HL. Then HL and B are decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing.
otdr
Opcode
ED BB
Bytes
2
Cycles
21/16
C
unaffected
N
set
P/V
undefined
H
undefined
Z
set
S
undefined
A byte from the memory location pointed to by HL is written to port C. Then HL and B are decremented. If B is not zero, this operation is repeated. Interrupts can trigger while this instruction is processing.

IY Instructions (FD)

0 1 2 3 4 5 6 7 8 9 A B C D E F
0 inc b
Opcode
FD 04
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec b
Opcode
FD 05
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from B.
ld b,n
Opcode
FD 06 n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into B.
add iy,bc
Opcode
FD 09
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of BC is added to IY.
inc c
Opcode
FD 0C
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec c
Opcode
FD 0D
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from C.
ld c,n
Opcode
FD 0E n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into C.
1 inc d
Opcode
FD 14
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec d
Opcode
FD 15
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from D.
ld d,n
Opcode
FD 16 n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into D.
add iy,de
Opcode
FD 19
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of DE is added to IY.
inc e
Opcode
FD 1C
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec e
Opcode
FD 1D
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from E.
ld e,n
Opcode
FD 1E n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into E.
2 ld iy,nn
Opcode
FD 21 nn
Bytes
4
Cycles
14
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads nn into register IY.
ld (nn),iy
Opcode
FD 22 nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores IY into the memory location pointed to by nn.
inc iy
Opcode
FD 23
Bytes
2
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Adds one to IY.
inc iyh
Opcode
FD 24
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec iyh
Opcode
FD 25
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from IYH.
ld iyh,n
Opcode
FD 26 n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into IYH.
add iy,iy
Opcode
FD 29
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of IX is added to IY.
ld iy,(nn)
Opcode
FD 2A nn
Bytes
4
Cycles
20
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by nn into IY.
dec iy
Opcode
FD 2B
Bytes
2
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Subtracts one from IY.
inc iyl
Opcode
FD 2C
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec iyl
Opcode
FD 2D
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from IYL.
ld iyl,n
Opcode
FD 2E n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into IYL.
3 inc (iy+d)
Opcode
FD 34 d
Bytes
3
Cycles
23
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to the memory location pointed to by IY plus d.
dec (iy+d)
Opcode
FD 35 d
Bytes
3
Cycles
23
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from the memory location pointed to by IY plus d.
ld (iy+d),n
Opcode
FD 36 d n
Bytes
4
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores n to the memory location pointed to by IY plus d.
add iy,sp
Opcode
FD 39
Bytes
2
Cycles
15
C
as defined
N
as defined
P/V
unaffected
H
as defined
Z
unaffected
S
unaffected
The value of SP is added to IY.
inc a
Opcode
FD 3C
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds one to r.
dec a
Opcode
FD 3D
Bytes
2
Cycles
8
C
unaffected
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts one from A.
ld a,n
Opcode
FD 3E n
Bytes
3
Cycles
11
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads n into A.
4 ld b,b
Opcode
FD 40
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into B.
ld b,c
Opcode
FD 41
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into B.
ld b,d
Opcode
FD 42
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into B.
ld b,e
Opcode
FD 43
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into B.
ld b,iyh
Opcode
FD 44
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYH are loaded into B.
ld b,iyl
Opcode
FD 45
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYL are loaded into B.
ld b,(iy+d)
Opcode
FD 46 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IY plus d into B.
ld b,a
Opcode
FD 47
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into B.
ld c,b
Opcode
FD 48
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into C.
ld c,c
Opcode
FD 49
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into C.
ld c,d
Opcode
FD 4A
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into C.
ld c,e
Opcode
FD 4B
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into C.
ld c,iyh
Opcode
FD 4C
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYH are loaded into C.
ld c,iyl
Opcode
FD 4D
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYL are loaded into C.
ld c,(iy+d)
Opcode
FD 4E d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IY plus d into C.
ld c,a
Opcode
FD 4F
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into C.
5 ld d,b
Opcode
FD 50
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into D.
ld d,c
Opcode
FD 51
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into D.
ld d,d
Opcode
FD 52
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into D.
ld d,e
Opcode
FD 53
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into D.
ld d,iyh
Opcode
FD 54
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYH are loaded into D.
ld d,iyl
Opcode
FD 55
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYL are loaded into D.
ld d,(iy+d)
Opcode
FD 56 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IY plus d into D.
ld d,a
Opcode
FD 57
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into D.
ld e,b
Opcode
FD 58
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into E.
ld e,c
Opcode
FD 59
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into E.
ld e,d
Opcode
FD 5A
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into E.
ld e,e
Opcode
FD 5B
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into E.
ld e,iyh
Opcode
FD 5C
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYH are loaded into E.
ld e,iyl
Opcode
FD 5D
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYL are loaded into E.
ld e,(iy+d)
Opcode
FD 5E d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IY plus d into E.
ld e,a
Opcode
FD 5F
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into E.
6 ld iyh,b
Opcode
FD 60
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into IYH.
ld iyh,c
Opcode
FD 61
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into IYH.
ld iyh,d
Opcode
FD 62
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into IYH.
ld iyh,e
Opcode
FD 63
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into IYH.
ld iyh,iyh
Opcode
FD 64
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYH are loaded into IYH.
ld iyh,iyl
Opcode
FD 65
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYL are loaded into IYH.
ld h,(iy+d)
Opcode
FD 66 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IY plus d into H.
ld iyh,a
Opcode
FD 67
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into IYH.
ld iyl,b
Opcode
FD 68
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into IYL.
ld iyl,c
Opcode
FD 69
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into IYL.
ld iyl,d
Opcode
FD 6A
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into IYL.
ld iyl,e
Opcode
FD 6B
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into IYL.
ld iyl,iyh
Opcode
FD 6C
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYH are loaded into IYL.
ld iyl,iyl
Opcode
FD 6D
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYL are loaded into IYL.
ld l,(iy+d)
Opcode
FD 6E d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IY plus d into L.
ld iyl,a
Opcode
FD 6F
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into IYL.
7 ld (iy+d),b
Opcode
FD 70 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores B to the memory location pointed to by IY plus d.
ld (iy+d),c
Opcode
FD 71 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores C to the memory location pointed to by IY plus d.
ld (iy+d),d
Opcode
FD 72 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores D to the memory location pointed to by IY plus d.
ld (iy+d),e
Opcode
FD 73 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores E to the memory location pointed to by IY plus d.
ld (iy+d),h
Opcode
FD 74 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores H to the memory location pointed to by IY plus d.
ld (iy+d),l
Opcode
FD 75 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores L to the memory location pointed to by IY plus d.
ld (iy+d),a
Opcode
FD 77 d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Stores A to the memory location pointed to by IY plus d.
ld a,b
Opcode
FD 78
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of B are loaded into A.
ld a,c
Opcode
FD 79
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of C are loaded into A.
ld a,d
Opcode
FD 7A
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of D are loaded into A.
ld a,e
Opcode
FD 7B
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of E are loaded into A.
ld a,iyh
Opcode
FD 7C
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYH are loaded into A.
ld a,iyl
Opcode
FD 7D
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of IYL are loaded into A.
ld a,(iy+d)
Opcode
FD 7E d
Bytes
3
Cycles
19
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value pointed to by IY plus d into A.
ld a,a
Opcode
FD 7F
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The contents of A are loaded into A.
8 add a,b
Opcode
FD 80
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds B to A.
add a,c
Opcode
FD 81
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds C to A.
add a,d
Opcode
FD 82
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds D to A.
add a,e
Opcode
FD 83
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds E to A.
add a,iyh
Opcode
FD 84
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds IYH to A.
add a,iyl
Opcode
FD 85
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds IYL to A.
add a,(iy+d)
Opcode
FD 86 d
Bytes
3
Cycles
19
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds the value pointed to by IY plus d to A.
add a,a
Opcode
FD 87
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds A to A.
adc a,b
Opcode
FD 88
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds B and the carry flag to A.
adc a,c
Opcode
FD 89
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds C and the carry flag to A.
adc a,d
Opcode
FD 8A
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds D and the carry flag to A.
adc a,e
Opcode
FD 8B
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds E and the carry flag to A.
adc a,iyh
Opcode
FD 8C
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds IYH and the carry flag to A.
adc a,iyl
Opcode
FD 8D
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds IYL and the carry flag to A.
adc a,(iy+d)
Opcode
FD 8E d
Bytes
3
Cycles
19
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds the value pointed to by IY plus d and the carry flag to A.
adc a,a
Opcode
FD 8F
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Adds A and the carry flag to A.
9 sub b
Opcode
FD 90
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts B from A.
sub c
Opcode
FD 91
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts C from A.
sub d
Opcode
FD 92
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts D from A.
sub e
Opcode
FD 93
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts E from A.
sub iyh
Opcode
FD 94
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IYH from A.
sub iyl
Opcode
FD 95
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IYL from A.
sub (iy+d)
Opcode
FD 96 d
Bytes
3
Cycles
19
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts the value pointed to by IY plus d from A.
sub a
Opcode
FD 97
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts A from A.
sbc a,b
Opcode
FD 98
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts B and the carry flag from A.
sbc a,c
Opcode
FD 99
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts C and the carry flag from A.
sbc a,d
Opcode
FD 9A
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts D and the carry flag from A.
sbc a,e
Opcode
FD 9B
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts E and the carry flag from A.
sbc a,iyh
Opcode
FD 9C
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IYH and the carry flag from A.
sbc a,iyl
Opcode
FD 9D
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IYL and the carry flag from A.
sbc a,(iy+d)
Opcode
FD 9E d
Bytes
3
Cycles
19
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts the value pointed to by IY plus d and the carry flag from A.
sbc a,a
Opcode
FD 9F
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts A and the carry flag from A.
A and b
Opcode
FD A0
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with B.
and c
Opcode
FD A1
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with C.
and d
Opcode
FD A2
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with D.
and e
Opcode
FD A3
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with E.
and iyh
Opcode
FD A4
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with IYH.
and iyl
Opcode
FD A5
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with IYL.
and (iy+d)
Opcode
FD A6 d
Bytes
3
Cycles
19
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with the value pointed to by IY plus d.
and a
Opcode
FD A7
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
set
Z
as defined
S
as defined
Bitwise AND on A with A.
xor b
Opcode
FD A8
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with B.
xor c
Opcode
FD A9
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with C.
xor d
Opcode
FD AA
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with D.
xor e
Opcode
FD AB
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with E.
xor iyh
Opcode
FD AC
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with IYH.
xor iyl
Opcode
FD AD
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with IYL.
xor (iy+d)
Opcode
FD AE d
Bytes
3
Cycles
19
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with the value pointed to by IY plus d.
xor a
Opcode
FD AF
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise XOR on A with A.
B or b
Opcode
FD B0
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or c
Opcode
FD B1
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or d
Opcode
FD B2
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or e
Opcode
FD B3
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or iyh
Opcode
FD B4
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or iyl
Opcode
FD B5
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
or (iy+d)
Opcode
FD B6 d
Bytes
3
Cycles
19
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with the value pointed to by IY plus d.
or a
Opcode
FD B7
Bytes
2
Cycles
8
C
reset
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
Bitwise OR on A with r.
cp b
Opcode
FD B8
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts B from A and affects flags according to the result. A is not modified.
cp c
Opcode
FD B9
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts C from A and affects flags according to the result. A is not modified.
cp d
Opcode
FD BA
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts D from A and affects flags according to the result. A is not modified.
cp e
Opcode
FD BB
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts E from A and affects flags according to the result. A is not modified.
cp iyh
Opcode
FD BC
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IYH from A and affects flags according to the result. A is not modified.
cp iyl
Opcode
FD BD
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts IYL from A and affects flags according to the result. A is not modified.
cp (iy+d)
Opcode
FD BE d
Bytes
3
Cycles
19
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts the value pointed to by IY plus d from A and affects flags according to the result. A is not modified.
cp a
Opcode
FD BF
Bytes
2
Cycles
8
C
as defined
N
as defined
P/V
detects overflow
H
as defined
Z
as defined
S
as defined
Subtracts A from A and affects flags according to the result. A is not modified.
C IY Bit
E pop iy
Opcode
FD E1
Bytes
2
Cycles
14
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
The memory location pointed to by SP is stored into IYL and SP is incremented. The memory location pointed to by SP is stored into IYH and SP is incremented again.
ex (sp),iy
Opcode
FD E3
Bytes
2
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Exchanges (SP) with IYL, and (SP+1) with IYH.
push iy
Opcode
FD E5
Bytes
2
Cycles
15
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
SP is decremented and IYH is stored into the memory location pointed to by SP. SP is decremented again and IYL is stored into the memory location pointed to by SP.
jp (iy)
Opcode
FD E9
Bytes
2
Cycles
8
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value of IY into pc.
F ld sp,iy
Opcode
FD F9
Bytes
2
Cycles
10
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Loads the value of IY into SP.

IY Bit Instructions (FDCB)

0 1 2 3 4 5 6 7 8 9 A B C D E F
0 rlc (iy+d),b
Opcode
FD CB d 00
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in B.
rlc (iy+d),c
Opcode
FD CB d 01
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in C.
rlc (iy+d),d
Opcode
FD CB d 02
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in D.
rlc (iy+d),e
Opcode
FD CB d 03
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in E.
rlc (iy+d),h
Opcode
FD CB d 04
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in H.
rlc (iy+d),l
Opcode
FD CB d 05
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in L.
rlc (iy+d)
Opcode
FD CB d 06
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0.
rlc (iy+d),a
Opcode
FD CB d 07
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and bit 0. The result is then stored in A.
rrc (iy+d),b
Opcode
FD CB d 08
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in B.
rrc (iy+d),c
Opcode
FD CB d 09
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in C.
rrc (iy+d),d
Opcode
FD CB d 0A
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in D.
rrc (iy+d),e
Opcode
FD CB d 0B
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in E.
rrc (iy+d),h
Opcode
FD CB d 0C
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in H.
rrc (iy+d),l
Opcode
FD CB d 0D
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in L.
rrc (iy+d)
Opcode
FD CB d 0E
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7.
rrc (iy+d),a
Opcode
FD CB d 0F
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and bit 7. The result is then stored in A.
1 rl (iy+d),b
Opcode
FD CB d 10
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in B.
rl (iy+d),c
Opcode
FD CB d 11
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in C.
rl (iy+d),d
Opcode
FD CB d 12
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in D.
rl (iy+d),e
Opcode
FD CB d 13
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in E.
rl (iy+d),h
Opcode
FD CB d 14
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in H.
rl (iy+d),l
Opcode
FD CB d 15
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in L.
rl (iy+d)
Opcode
FD CB d 16
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0.
rl (iy+d),a
Opcode
FD CB d 17
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated left one bit position. The contents of bit 7 are copied to the carry flag and the previous contents of the carry flag are copied to bit 0. The result is then stored in A.
rr (iy+d),b
Opcode
FD CB d 18
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in B.
rr (iy+d),c
Opcode
FD CB d 19
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in C.
rr (iy+d),d
Opcode
FD CB d 1A
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in D.
rr (iy+d),e
Opcode
FD CB d 1B
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in E.
rr (iy+d),h
Opcode
FD CB d 1C
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in H.
rr (iy+d),l
Opcode
FD CB d 1D
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in L.
rr (iy+d)
Opcode
FD CB d 1E
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7.
rr (iy+d),a
Opcode
FD CB d 1F
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are rotated right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of the carry flag are copied to bit 7. The result is then stored in A.
2 sla (iy+d),b
Opcode
FD CB d 20
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in B.
sla (iy+d),c
Opcode
FD CB d 21
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in C.
sla (iy+d),d
Opcode
FD CB d 22
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in D.
sla (iy+d),e
Opcode
FD CB d 23
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in E.
sla (iy+d),h
Opcode
FD CB d 24
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in H.
sla (iy+d),l
Opcode
FD CB d 25
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in L.
sla (iy+d)
Opcode
FD CB d 26
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0.
sla (iy+d),a
Opcode
FD CB d 27
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are copied to the carry flag and a zero is put into bit 0. The result is then stored in A.
sra (iy+d),b
Opcode
FD CB d 28
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in B.
sra (iy+d),c
Opcode
FD CB d 29
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in C.
sra (iy+d),d
Opcode
FD CB d 2A
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in D.
sra (iy+d),e
Opcode
FD CB d 2B
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in E.
sra (iy+d),h
Opcode
FD CB d 2C
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in H.
sra (iy+d),l
Opcode
FD CB d 2D
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in L.
sra (iy+d)
Opcode
FD CB d 2E
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged.
sra (iy+d),a
Opcode
FD CB d 2F
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and the previous contents of bit 7 are unchanged. The result is then stored in A.
3 sll (iy+d),b
Opcode
FD CB d 30
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in B.
sll (iy+d),c
Opcode
FD CB d 31
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in C.
sll (iy+d),d
Opcode
FD CB d 32
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in D.
sll (iy+d),e
Opcode
FD CB d 33
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in E.
sll (iy+d),h
Opcode
FD CB d 34
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in H.
sll (iy+d),l
Opcode
FD CB d 35
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in L.
sll (iy+d)
Opcode
FD CB d 36
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0.
sll (iy+d),a
Opcode
FD CB d 37
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted left one bit position. The contents of bit 7 are put into the carry flag and a one is put into bit 0. The result is then stored in A.
srl (iy+d),b
Opcode
FD CB d 38
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in B.
srl (iy+d),c
Opcode
FD CB d 39
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in C.
srl (iy+d),d
Opcode
FD CB d 3A
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in D.
srl (iy+d),e
Opcode
FD CB d 3B
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in E.
srl (iy+d),h
Opcode
FD CB d 3C
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in H.
srl (iy+d),l
Opcode
FD CB d 3D
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in L.
srl (iy+d)
Opcode
FD CB d 3E
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7.
srl (iy+d),a
Opcode
FD CB d 3F
Bytes
4
Cycles
23
C
as defined
N
reset
P/V
detects parity
H
reset
Z
as defined
S
as defined
The contents of the memory location pointed to by IY plus d are shifted right one bit position. The contents of bit 0 are copied to the carry flag and a zero is put into bit 7. The result is then stored in A.
4 bit 0,(iy+d)
Opcode
FD CB d 40
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IY plus d.
bit 0,(iy+d)
Opcode
FD CB d 41
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IY plus d.
bit 0,(iy+d)
Opcode
FD CB d 42
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IY plus d.
bit 0,(iy+d)
Opcode
FD CB d 43
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IY plus d.
bit 0,(iy+d)
Opcode
FD CB d 44
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IY plus d.
bit 0,(iy+d)
Opcode
FD CB d 45
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IY plus d.
bit 0,(iy+d)
Opcode
FD CB d 46
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IY plus d.
bit 0,(iy+d)
Opcode
FD CB d 47
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 0 of the memory location pointed to by IY plus d.
bit 1,(iy+d)
Opcode
FD CB d 48
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IY plus d.
bit 1,(iy+d)
Opcode
FD CB d 49
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IY plus d.
bit 1,(iy+d)
Opcode
FD CB d 4A
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IY plus d.
bit 1,(iy+d)
Opcode
FD CB d 4B
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IY plus d.
bit 1,(iy+d)
Opcode
FD CB d 4C
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IY plus d.
bit 1,(iy+d)
Opcode
FD CB d 4D
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IY plus d.
bit 1,(iy+d)
Opcode
FD CB d 4E
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IY plus d.
bit 1,(iy+d)
Opcode
FD CB d 4F
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 1 of the memory location pointed to by IY plus d.
5 bit 2,(iy+d)
Opcode
FD CB d 50
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IY plus d.
bit 2,(iy+d)
Opcode
FD CB d 51
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IY plus d.
bit 2,(iy+d)
Opcode
FD CB d 52
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IY plus d.
bit 2,(iy+d)
Opcode
FD CB d 53
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IY plus d.
bit 2,(iy+d)
Opcode
FD CB d 54
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IY plus d.
bit 2,(iy+d)
Opcode
FD CB d 55
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IY plus d.
bit 2,(iy+d)
Opcode
FD CB d 56
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IY plus d.
bit 2,(iy+d)
Opcode
FD CB d 57
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 2 of the memory location pointed to by IY plus d.
bit 3,(iy+d)
Opcode
FD CB d 58
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IY plus d.
bit 3,(iy+d)
Opcode
FD CB d 59
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IY plus d.
bit 3,(iy+d)
Opcode
FD CB d 5A
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IY plus d.
bit 3,(iy+d)
Opcode
FD CB d 5B
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IY plus d.
bit 3,(iy+d)
Opcode
FD CB d 5C
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IY plus d.
bit 3,(iy+d)
Opcode
FD CB d 5D
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IY plus d.
bit 3,(iy+d)
Opcode
FD CB d 5E
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IY plus d.
bit 3,(iy+d)
Opcode
FD CB d 5F
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 3 of the memory location pointed to by IY plus d.
6 bit 4,(iy+d)
Opcode
FD CB d 60
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IY plus d.
bit 4,(iy+d)
Opcode
FD CB d 61
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IY plus d.
bit 4,(iy+d)
Opcode
FD CB d 62
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IY plus d.
bit 4,(iy+d)
Opcode
FD CB d 63
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IY plus d.
bit 4,(iy+d)
Opcode
FD CB d 64
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IY plus d.
bit 4,(iy+d)
Opcode
FD CB d 65
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IY plus d.
bit 4,(iy+d)
Opcode
FD CB d 66
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IY plus d.
bit 4,(iy+d)
Opcode
FD CB d 67
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 4 of the memory location pointed to by IY plus d.
bit 5,(iy+d)
Opcode
FD CB d 68
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IY plus d.
bit 5,(iy+d)
Opcode
FD CB d 69
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IY plus d.
bit 5,(iy+d)
Opcode
FD CB d 6A
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IY plus d.
bit 5,(iy+d)
Opcode
FD CB d 6B
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IY plus d.
bit 5,(iy+d)
Opcode
FD CB d 6C
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IY plus d.
bit 5,(iy+d)
Opcode
FD CB d 6D
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IY plus d.
bit 5,(iy+d)
Opcode
FD CB d 6E
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IY plus d.
bit 5,(iy+d)
Opcode
FD CB d 6F
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 5 of the memory location pointed to by IY plus d.
7 bit 6,(iy+d)
Opcode
FD CB d 70
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IY plus d.
bit 6,(iy+d)
Opcode
FD CB d 71
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IY plus d.
bit 6,(iy+d)
Opcode
FD CB d 72
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IY plus d.
bit 6,(iy+d)
Opcode
FD CB d 73
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IY plus d.
bit 6,(iy+d)
Opcode
FD CB d 74
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IY plus d.
bit 6,(iy+d)
Opcode
FD CB d 75
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IY plus d.
bit 6,(iy+d)
Opcode
FD CB d 76
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IY plus d.
bit 6,(iy+d)
Opcode
FD CB d 77
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 6 of the memory location pointed to by IY plus d.
bit 7,(iy+d)
Opcode
FD CB d 78
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IY plus d.
bit 7,(iy+d)
Opcode
FD CB d 79
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IY plus d.
bit 7,(iy+d)
Opcode
FD CB d 7A
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IY plus d.
bit 7,(iy+d)
Opcode
FD CB d 7B
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IY plus d.
bit 7,(iy+d)
Opcode
FD CB d 7C
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IY plus d.
bit 7,(iy+d)
Opcode
FD CB d 7D
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IY plus d.
bit 7,(iy+d)
Opcode
FD CB d 7E
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IY plus d.
bit 7,(iy+d)
Opcode
FD CB d 7F
Bytes
4
Cycles
20
C
unaffected
N
reset
P/V
undefined
H
set
Z
as defined
S
undefined
Tests bit 7 of the memory location pointed to by IY plus d.
8 res 0,(iy+d),b
Opcode
FD CB d 80
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IY plus d. The result is then stored in B.
res 0,(iy+d),c
Opcode
FD CB d 81
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IY plus d. The result is then stored in C.
res 0,(iy+d),d
Opcode
FD CB d 82
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IY plus d. The result is then stored in D.
res 0,(iy+d),e
Opcode
FD CB d 83
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IY plus d. The result is then stored in E.
res 0,(iy+d),h
Opcode
FD CB d 84
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IY plus d. The result is then stored in H.
res 0,(iy+d),l
Opcode
FD CB d 85
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IY plus d. The result is then stored in L.
res 0,(iy+d)
Opcode
FD CB d 86
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IY plus d.
res 0,(iy+d),a
Opcode
FD CB d 87
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 0 of the memory location pointed to by IY plus d. The result is then stored in A.
res 1,(iy+d),b
Opcode
FD CB d 88
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IY plus d. The result is then stored in B.
res 1,(iy+d),c
Opcode
FD CB d 89
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IY plus d. The result is then stored in C.
res 1,(iy+d),d
Opcode
FD CB d 8A
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IY plus d. The result is then stored in D.
res 1,(iy+d),e
Opcode
FD CB d 8B
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IY plus d. The result is then stored in E.
res 1,(iy+d),h
Opcode
FD CB d 8C
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IY plus d. The result is then stored in H.
res 1,(iy+d),l
Opcode
FD CB d 8D
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IY plus d. The result is then stored in L.
res 1,(iy+d)
Opcode
FD CB d 8E
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IY plus d.
res 1,(iy+d),a
Opcode
FD CB d 8F
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 1 of the memory location pointed to by IY plus d. The result is then stored in A.
9 res 2,(iy+d),b
Opcode
FD CB d 90
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IY plus d. The result is then stored in B.
res 2,(iy+d),c
Opcode
FD CB d 91
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IY plus d. The result is then stored in C.
res 2,(iy+d),d
Opcode
FD CB d 92
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IY plus d. The result is then stored in D.
res 2,(iy+d),e
Opcode
FD CB d 93
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IY plus d. The result is then stored in E.
res 2,(iy+d),h
Opcode
FD CB d 94
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IY plus d. The result is then stored in H.
res 2,(iy+d),l
Opcode
FD CB d 95
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IY plus d. The result is then stored in L.
res 2,(iy+d)
Opcode
FD CB d 96
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IY plus d.
res 2,(iy+d),a
Opcode
FD CB d 97
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 2 of the memory location pointed to by IY plus d. The result is then stored in A.
res 3,(iy+d),b
Opcode
FD CB d 98
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IY plus d. The result is then stored in B.
res 3,(iy+d),c
Opcode
FD CB d 99
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IY plus d. The result is then stored in C.
res 3,(iy+d),d
Opcode
FD CB d 9A
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IY plus d. The result is then stored in D.
res 3,(iy+d),e
Opcode
FD CB d 9B
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IY plus d. The result is then stored in E.
res 3,(iy+d),h
Opcode
FD CB d 9C
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IY plus d. The result is then stored in H.
res 3,(iy+d),l
Opcode
FD CB d 9D
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IY plus d. The result is then stored in L.
res 3,(iy+d)
Opcode
FD CB d 9E
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IY plus d.
res 3,(iy+d),a
Opcode
FD CB d 9F
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 3 of the memory location pointed to by IY plus d. The result is then stored in A.
A res 4,(iy+d),b
Opcode
FD CB d A0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IY plus d. The result is then stored in B.
res 4,(iy+d),c
Opcode
FD CB d A1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IY plus d. The result is then stored in C.
res 4,(iy+d),d
Opcode
FD CB d A2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IY plus d. The result is then stored in D.
res 4,(iy+d),e
Opcode
FD CB d A3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IY plus d. The result is then stored in E.
res 4,(iy+d),h
Opcode
FD CB d A4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IY plus d. The result is then stored in H.
res 4,(iy+d),l
Opcode
FD CB d A5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IY plus d. The result is then stored in L.
res 4,(iy+d)
Opcode
FD CB d A6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IY plus d.
res 4,(iy+d),a
Opcode
FD CB d A7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 4 of the memory location pointed to by IY plus d. The result is then stored in A.
res 5,(iy+d),b
Opcode
FD CB d A8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IY plus d. The result is then stored in B.
res 5,(iy+d),c
Opcode
FD CB d A9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IY plus d. The result is then stored in C.
res 5,(iy+d),d
Opcode
FD CB d AA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IY plus d. The result is then stored in D.
res 5,(iy+d),e
Opcode
FD CB d AB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IY plus d. The result is then stored in E.
res 5,(iy+d),h
Opcode
FD CB d AC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IY plus d. The result is then stored in H.
res 5,(iy+d),l
Opcode
FD CB d AD
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IY plus d. The result is then stored in L.
res 5,(iy+d)
Opcode
FD CB d AE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IY plus d.
res 5,(iy+d),a
Opcode
FD CB d AF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 5 of the memory location pointed to by IY plus d. The result is then stored in A.
B res 6,(iy+d),b
Opcode
FD CB d B0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IY plus d. The result is then stored in B.
res 6,(iy+d),c
Opcode
FD CB d B1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IY plus d. The result is then stored in C.
res 6,(iy+d),d
Opcode
FD CB d B2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IY plus d. The result is then stored in D.
res 6,(iy+d),e
Opcode
FD CB d B3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IY plus d. The result is then stored in E.
res 6,(iy+d),h
Opcode
FD CB d B4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IY plus d. The result is then stored in H.
res 6,(iy+d),l
Opcode
FD CB d B5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IY plus d. The result is then stored in L.
res 6,(iy+d)
Opcode
FD CB d B6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IY plus d.
res 6,(iy+d),a
Opcode
FD CB d B7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 6 of the memory location pointed to by IY plus d. The result is then stored in A.
res 7,(iy+d),b
Opcode
FD CB d B8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IY plus d. The result is then stored in B.
res 7,(iy+d),c
Opcode
FD CB d B9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IY plus d. The result is then stored in C.
res 7,(iy+d),d
Opcode
FD CB d BA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IY plus d. The result is then stored in D.
res 7,(iy+d),e
Opcode
FD CB d BB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IY plus d. The result is then stored in E.
res 7,(iy+d),h
Opcode
FD CB d BC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IY plus d. The result is then stored in H.
res 7,(iy+d),l
Opcode
FD CB d BD
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IY plus d. The result is then stored in L.
res 7,(iy+d)
Opcode
FD CB d BE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IY plus d.
res 7,(iy+d),a
Opcode
FD CB d BF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Resets bit 7 of the memory location pointed to by IY plus d. The result is then stored in A.
C set 0,(iy+d),b
Opcode
FD CB d C0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IY plus d. The result is then stored in B.
set 0,(iy+d),c
Opcode
FD CB d C1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IY plus d. The result is then stored in C.
set 0,(iy+d),d
Opcode
FD CB d C2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IY plus d. The result is then stored in D.
set 0,(iy+d),e
Opcode
FD CB d C3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IY plus d. The result is then stored in E.
set 0,(iy+d),h
Opcode
FD CB d C4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IY plus d. The result is then stored in H.
set 0,(iy+d),l
Opcode
FD CB d C5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IY plus d. The result is then stored in L.
set 0,(iy+d)
Opcode
FD CB d C6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IY plus d.
set 0,(iy+d),a
Opcode
FD CB d C7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 0 of the memory location pointed to by IY plus d. The result is then stored in A.
set 1,(iy+d),b
Opcode
FD CB d C8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IY plus d. The result is then stored in B.
set 1,(iy+d),c
Opcode
FD CB d C9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IY plus d. The result is then stored in C.
set 1,(iy+d),d
Opcode
FD CB d CA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IY plus d. The result is then stored in D.
set 1,(iy+d),e
Opcode
FD CB d CB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IY plus d. The result is then stored in E.
set 1,(iy+d),h
Opcode
FD CB d CC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IY plus d. The result is then stored in H.
set 1,(iy+d),l
Opcode
FD CB d CD
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IY plus d. The result is then stored in L.
set 1,(iy+d)
Opcode
FD CB d CE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IY plus d.
set 1,(iy+d),a
Opcode
FD CB d CF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 1 of the memory location pointed to by IY plus d. The result is then stored in A.
D set 2,(iy+d),b
Opcode
FD CB d D0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IY plus d. The result is then stored in B.
set 2,(iy+d),c
Opcode
FD CB d D1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IY plus d. The result is then stored in C.
set 2,(iy+d),d
Opcode
FD CB d D2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IY plus d. The result is then stored in D.
set 2,(iy+d),e
Opcode
FD CB d D3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IY plus d. The result is then stored in E.
set 2,(iy+d),h
Opcode
FD CB d D4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IY plus d. The result is then stored in H.
set 2,(iy+d),l
Opcode
FD CB d D5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IY plus d. The result is then stored in L.
set 2,(iy+d)
Opcode
FD CB d D6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IY plus d.
set 2,(iy+d),a
Opcode
FD CB d D7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 2 of the memory location pointed to by IY plus d. The result is then stored in A.
set 3,(iy+d),b
Opcode
FD CB d D8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IY plus d. The result is then stored in B.
set 3,(iy+d),c
Opcode
FD CB d D9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IY plus d. The result is then stored in C.
set 3,(iy+d),d
Opcode
FD CB d DA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IY plus d. The result is then stored in D.
set 3,(iy+d),e
Opcode
FD CB d DB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IY plus d. The result is then stored in E.
set 3,(iy+d),h
Opcode
FD CB d DC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IY plus d. The result is then stored in H.
set 3,(iy+d),l
Opcode
FD CB d DD
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IY plus d. The result is then stored in L.
set 3,(iy+d)
Opcode
FD CB d DE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IY plus d.
set 3,(iy+d),a
Opcode
FD CB d DF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 3 of the memory location pointed to by IY plus d. The result is then stored in A.
E set 4,(iy+d),b
Opcode
FD CB d E0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IY plus d. The result is then stored in B.
set 4,(iy+d),c
Opcode
FD CB d E1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IY plus d. The result is then stored in C.
set 4,(iy+d),d
Opcode
FD CB d E2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IY plus d. The result is then stored in D.
set 4,(iy+d),e
Opcode
FD CB d E3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IY plus d. The result is then stored in E.
set 4,(iy+d),h
Opcode
FD CB d E4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IY plus d. The result is then stored in H.
set 4,(iy+d),l
Opcode
FD CB d E5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IY plus d. The result is then stored in L.
set 4,(iy+d)
Opcode
FD CB d E6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IY plus d.
set 4,(iy+d),a
Opcode
FD CB d E7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 4 of the memory location pointed to by IY plus d. The result is then stored in A.
set 5,(iy+d),b
Opcode
FD CB d E8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IY plus d. The result is then stored in B.
set 5,(iy+d),c
Opcode
FD CB d E9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IY plus d. The result is then stored in C.
set 5,(iy+d),d
Opcode
FD CB d EA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IY plus d. The result is then stored in D.
set 5,(iy+d),e
Opcode
FD CB d EB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IY plus d. The result is then stored in E.
set 5,(iy+d),h
Opcode
FD CB d EC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IY plus d. The result is then stored in H.
set 5,(iy+d),l
Opcode
FD CB d ED
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IY plus d. The result is then stored in L.
set 5,(iy+d)
Opcode
FD CB d EE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IY plus d.
set 5,(iy+d),a
Opcode
FD CB d EF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 5 of the memory location pointed to by IY plus d. The result is then stored in A.
F set 6,(iy+d),b
Opcode
FD CB d F0
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IY plus d. The result is then stored in B.
set 6,(iy+d),c
Opcode
FD CB d F1
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IY plus d. The result is then stored in C.
set 6,(iy+d),d
Opcode
FD CB d F2
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IY plus d. The result is then stored in D.
set 6,(iy+d),e
Opcode
FD CB d F3
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IY plus d. The result is then stored in E.
set 6,(iy+d),h
Opcode
FD CB d F4
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IY plus d. The result is then stored in H.
set 6,(iy+d),l
Opcode
FD CB d F5
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IY plus d. The result is then stored in L.
set 6,(iy+d)
Opcode
FD CB d F6
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IY plus d.
set 6,(iy+d),a
Opcode
FD CB d F7
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 6 of the memory location pointed to by IY plus d. The result is then stored in A.
set 7,(iy+d),b
Opcode
FD CB d F8
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IY plus d. The result is then stored in B.
set 7,(iy+d),c
Opcode
FD CB d F9
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IY plus d. The result is then stored in C.
set 7,(iy+d),d
Opcode
FD CB d FA
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IY plus d. The result is then stored in D.
set 7,(iy+d),e
Opcode
FD CB d FB
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IY plus d. The result is then stored in E.
set 7,(iy+d),h
Opcode
FD CB d FC
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IY plus d. The result is then stored in H.
set 7,(iy+d),l
Opcode
FD CB d FD
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IY plus d. The result is then stored in L.
set 7,(iy+d)
Opcode
FD CB d FE
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IY plus d.
set 7,(iy+d),a
Opcode
FD CB d FF
Bytes
4
Cycles
23
C
unaffected
N
unaffected
P/V
unaffected
H
unaffected
Z
unaffected
S
unaffected
Sets bit 7 of the memory location pointed to by IY plus d. The result is then stored in A.